Attention is currently required from: Nicholas Chin.
Angel Pons has posted comments on this change by Nicholas Chin. ( https://review.coreboot.org/c/coreboot/+/74187?usp=email )
Change subject: mb/lenovo: Add ThinkCentre M900 (Skylake/LGA 1151) ......................................................................
Patch Set 10:
(3 comments)
File src/mainboard/lenovo/m900/cmos.layout:
https://review.coreboot.org/c/coreboot/+/74187/comment/67b29e4d_32db5a32?usp... : PS10, Line 21: 400 1 e 2 hyper_threading Doesn't have a default
File src/mainboard/lenovo/m900/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/74187/comment/6a34ac9a_3006f5fb?usp... : PS10, Line 42: register "PrimaryDisplay" = "Display_PEG" Out of curiosity, why?
https://review.coreboot.org/c/coreboot/+/74187/comment/113e4607_5438e6f8?usp... : PS10, Line 122: register "gen1_dec" = "0x00fc0201" : register "gen2_dec" = "0x003c0a01" : register "gen3_dec" = "0x00040069" : register "gen4_dec" = "0x000c0081" Do we know what these decode ranges are used for?