Change in coreboot[master]: drivers/analogix: improve the clock tolance from 0.1% to 2%

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jitao shi (Code Review)

20 Feb 2020 20 Feb '20

10:12 a.m.

jitao shi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39025 )

Change subject: drivers/analogix: improve the clock tolance from 0.1% to 2% ......................................................................

drivers/analogix: improve the clock tolance from 0.1% to 2%

Improve the input tolance to avoid panel scroll.

BUG=b:149051882 BRANCH=kukui TEST=None

Change-Id: I4af96f58876932175b28fc0a8543720ebd7b5deb Signed-off-by: Jitao Shi jitao.shi@mediatek.com --- M src/drivers/analogix/anx7625/anx7625.c 1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/39025/1

diff --git a/src/drivers/analogix/anx7625/anx7625.c b/src/drivers/analogix/anx7625/anx7625.c index 9387a83b..d2d09d8 100644 --- a/src/drivers/analogix/anx7625/anx7625.c +++ b/src/drivers/analogix/anx7625/anx7625.c @@ -395,7 +395,7 @@ ret |= anx7625_reg_write(bus, RX_P1_ADDR, MIPI_PLL_N_NUM_7_0, (n & 0xff)); /* diff */ - ret |= anx7625_reg_write(bus, RX_P1_ADDR, MIPI_DIGITAL_ADJ_1, 0x37); + ret |= anx7625_reg_write(bus, RX_P1_ADDR, MIPI_DIGITAL_ADJ_1, 0x3d);

ret |= anx7625_odfc_config(bus, post_divider - 1);

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Hung-Te Lin (Code Review)

21 May 21 May

3:28 a.m.

Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39025 )

Change subject: drivers/analogix: improve the clock tolance from 0.1% to 2% ......................................................................

Patch Set 1:

should we abandon this?

Hung-Te Lin (Code Review)

12 Aug 12 Aug

2:53 a.m.

Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39025 )

Change subject: drivers/analogix: improve the clock tolance from 0.1% to 2% ......................................................................

Patch Set 1:

ping - do we still need this?

Chen-Tsung Hsieh (Code Review)

10 Mar 10 Mar

8:42 a.m.

Attention is currently required from: jitao shi. Chen-Tsung Hsieh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39025 )

Change subject: drivers/analogix: improve the clock tolance from 0.1% to 2% ......................................................................

Patch Set 1:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/39025/comment/78a6bb95_d407d45a PS1, Line 11: BUG=b:149051882 Please also list b:173603645 here.

Patchset:

PS1:

...

Patch Set 1:

ping - do we still need this?

Yes, we still need this.

Jitao Shi (Code Review)

12 Mar 12 Mar

9:47 a.m.

Attention is currently required from: jitao shi. Jitao Shi has uploaded a new patch set (#2) to the change originally created by jitao shi. ( https://review.coreboot.org/c/coreboot/+/39025 )

Change subject: drivers/analogix: improve the clock tolance from 0.1% to 2% ......................................................................

drivers/analogix: improve the clock tolance from 0.1% to 2%

Improve the input tolance to avoid panel scroll.

BUG=b:173603645 BRANCH=kukui TEST=None

Change-Id: I4af96f58876932175b28fc0a8543720ebd7b5deb Signed-off-by: Jitao Shi jitao.shi@mediatek.com --- M src/drivers/analogix/anx7625/anx7625.c 1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/39025/2

Hung-Te Lin (Code Review)

15 Mar 15 Mar

9:07 a.m.

Attention is currently required from: jitao shi. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39025 )

Change subject: drivers/analogix: improve the clock tolance from 0.1% to 2% ......................................................................

Patch Set 3: Code-Review+1

(1 comment)

Patchset:

PS3: please add the issue link as chentsung indicated

Chen-Tsung Hsieh (Code Review)

9:45 a.m.

Attention is currently required from: Chen-Tsung Hsieh, jitao shi. Chen-Tsung Hsieh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39025 )

Change subject: drivers/analogix: improve the clock tolance from 0.1% to 2% ......................................................................

Patch Set 3:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/39025/comment/c8f0f79c_8c3152aa PS1, Line 11: BUG=b:149051882

...

Please also list b:173603645 here.

BUG=b:149051882, b:173603645

-- To view, visit https://review.coreboot.org/c/coreboot/+/39025 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4af96f58876932175b28fc0a8543720ebd7b5deb Gerrit-Change-Number: 39025 Gerrit-PatchSet: 3 Gerrit-Owner: jitao shi jitao.shi@mediatek.com Gerrit-Reviewer: Hung-Te Lin hungte@chromium.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Chen-Tsung Hsieh chentsung@chromium.org Gerrit-CC: Chen-Tsung Hsieh chentsung@google.com Gerrit-Attention: Chen-Tsung Hsieh chentsung@google.com Gerrit-Attention: jitao shi jitao.shi@mediatek.com Gerrit-Comment-Date: Mon, 15 Mar 2021 09:45:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Chen-Tsung Hsieh chentsung@google.com Gerrit-MessageType: comment

Yu-Ping Wu (Code Review)

16 Mar 16 Mar

5:33 a.m.

Attention is currently required from: jitao shi. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39025 )

Change subject: drivers/analogix: improve the clock tolance from 0.1% to 2% ......................................................................

Patch Set 3:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/39025/comment/1e11a914_e7636adb PS3, Line 7: tolance tolerance

https://review.coreboot.org/c/coreboot/+/39025/comment/401585af_df934336 PS3, Line 7: improve Increase

https://review.coreboot.org/c/coreboot/+/39025/comment/d5e011a6_78a6a42b PS3, Line 9: Improve Increase

https://review.coreboot.org/c/coreboot/+/39025/comment/4d361b7d_a4c06569 PS3, Line 9: tolance tolerance

Shaoming Chen (Code Review)

22 Mar 22 Mar

8:20 a.m.

Attention is currently required from: jitao shi. Shaoming Chen has uploaded a new patch set (#4) to the change originally created by jitao shi. ( https://review.coreboot.org/c/coreboot/+/39025 )

Change subject: drivers/analogix: improve the clock tolance from 0.1% to 2% ......................................................................

drivers/analogix: improve the clock tolance from 0.1% to 2%

Increase the input tolerance to avoid panel scroll.

BUG=b:173603645 BRANCH=kukui TEST=None

Change-Id: I4af96f58876932175b28fc0a8543720ebd7b5deb Signed-off-by: Jitao Shi jitao.shi@mediatek.com --- M src/drivers/analogix/anx7625/anx7625.c 1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/39025/4

Shaoming Chen (Code Review)

8:21 a.m.

Attention is currently required from: jitao shi, Yu-Ping Wu. Shaoming Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39025 )

Change subject: drivers/analogix: improve the clock tolance from 0.1% to 2% ......................................................................

Patch Set 4:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/39025/comment/8186caff_64556a7b PS3, Line 7: improve

...

Increase

Done

https://review.coreboot.org/c/coreboot/+/39025/comment/8a07d0d2_f9f296af PS3, Line 7: tolance

...

tolerance

Done

https://review.coreboot.org/c/coreboot/+/39025/comment/d869143c_923df250 PS3, Line 9: tolance

...

tolerance

Done

https://review.coreboot.org/c/coreboot/+/39025/comment/5471d069_bbf757f2 PS3, Line 9: Improve

...

Increase

Done

-- To view, visit https://review.coreboot.org/c/coreboot/+/39025 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4af96f58876932175b28fc0a8543720ebd7b5deb Gerrit-Change-Number: 39025 Gerrit-PatchSet: 4 Gerrit-Owner: jitao shi jitao.shi@mediatek.com Gerrit-Reviewer: Hung-Te Lin hungte@chromium.org Gerrit-Reviewer: Yu-Ping Wu yupingso@google.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Chen-Tsung Hsieh chentsung@chromium.org Gerrit-CC: Chen-Tsung Hsieh chentsung@google.com Gerrit-CC: Shaoming Chen shaoming.chen@mediatek.corp-partner.google.com Gerrit-Attention: jitao shi jitao.shi@mediatek.com Gerrit-Attention: Yu-Ping Wu yupingso@google.com Gerrit-Comment-Date: Mon, 22 Mar 2021 08:21:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu yupingso@google.com Gerrit-MessageType: comment

Yu-Ping Wu (Code Review)

23 Mar 23 Mar

10:43 a.m.

Attention is currently required from: Shaoming Chen, jitao shi. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39025 )

Change subject: drivers/analogix: improve the clock tolance from 0.1% to 2% ......................................................................

Patch Set 4:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/39025/comment/08540032_7b0f2b04 PS3, Line 7: improve

...

Done

Not done yet.

https://review.coreboot.org/c/coreboot/+/39025/comment/9eedda42_e191da85 PS3, Line 7: tolance

...

Done

Not done yet.

-- To view, visit https://review.coreboot.org/c/coreboot/+/39025 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4af96f58876932175b28fc0a8543720ebd7b5deb Gerrit-Change-Number: 39025 Gerrit-PatchSet: 4 Gerrit-Owner: jitao shi jitao.shi@mediatek.com Gerrit-Reviewer: Hung-Te Lin hungte@chromium.org Gerrit-Reviewer: Yu-Ping Wu yupingso@google.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Chen-Tsung Hsieh chentsung@chromium.org Gerrit-CC: Chen-Tsung Hsieh chentsung@google.com Gerrit-CC: Shaoming Chen shaoming.chen@mediatek.corp-partner.google.com Gerrit-Attention: Shaoming Chen shaoming.chen@mediatek.corp-partner.google.com Gerrit-Attention: jitao shi jitao.shi@mediatek.com Gerrit-Comment-Date: Tue, 23 Mar 2021 10:43:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shaoming Chen shaoming.chen@mediatek.corp-partner.google.com Comment-In-Reply-To: Yu-Ping Wu yupingso@google.com Gerrit-MessageType: comment

Shaoming Chen (Code Review)

25 Mar 25 Mar

7:52 a.m.

New subject: Change in coreboot[master]: drivers/analogix: Increase the clock tolerance from 0.1% to 2%

Attention is currently required from: Shaoming Chen, jitao shi. Shaoming Chen has uploaded a new patch set (#5) to the change originally created by jitao shi. ( https://review.coreboot.org/c/coreboot/+/39025 )

Change subject: drivers/analogix: Increase the clock tolerance from 0.1% to 2% ......................................................................

drivers/analogix: Increase the clock tolerance from 0.1% to 2%

Increase the input tolerance to avoid panel scroll.

BUG=b:173603645 BRANCH=kukui TEST=None

Change-Id: I4af96f58876932175b28fc0a8543720ebd7b5deb Signed-off-by: Jitao Shi jitao.shi@mediatek.com --- M src/drivers/analogix/anx7625/anx7625.c 1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/39025/5

-- To view, visit https://review.coreboot.org/c/coreboot/+/39025 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4af96f58876932175b28fc0a8543720ebd7b5deb Gerrit-Change-Number: 39025 Gerrit-PatchSet: 5 Gerrit-Owner: jitao shi jitao.shi@mediatek.com Gerrit-Reviewer: Hung-Te Lin hungte@chromium.org Gerrit-Reviewer: Yu-Ping Wu yupingso@google.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Chen-Tsung Hsieh chentsung@chromium.org Gerrit-CC: Chen-Tsung Hsieh chentsung@google.com Gerrit-CC: Shaoming Chen shaoming.chen@mediatek.corp-partner.google.com Gerrit-Attention: Shaoming Chen shaoming.chen@mediatek.corp-partner.google.com Gerrit-Attention: jitao shi jitao.shi@mediatek.com Gerrit-MessageType: newpatchset

Shaoming Chen (Code Review)

7:53 a.m.

New subject: Change in coreboot[master]: drivers/analogix: Increase the clock tolerance from 0.1% to 2%

Attention is currently required from: jitao shi, Yu-Ping Wu. Shaoming Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39025 )

Change subject: drivers/analogix: Increase the clock tolerance from 0.1% to 2% ......................................................................

Patch Set 5:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/39025/comment/b8c1b41f_31cef0b9 PS3, Line 7: tolance

...

Not done yet.

Done

https://review.coreboot.org/c/coreboot/+/39025/comment/8a44106c_5f89af45 PS3, Line 7: improve

...

Not done yet.

Done

-- To view, visit https://review.coreboot.org/c/coreboot/+/39025 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4af96f58876932175b28fc0a8543720ebd7b5deb Gerrit-Change-Number: 39025 Gerrit-PatchSet: 5 Gerrit-Owner: jitao shi jitao.shi@mediatek.com Gerrit-Reviewer: Hung-Te Lin hungte@chromium.org Gerrit-Reviewer: Yu-Ping Wu yupingso@google.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Chen-Tsung Hsieh chentsung@chromium.org Gerrit-CC: Chen-Tsung Hsieh chentsung@google.com Gerrit-CC: Shaoming Chen shaoming.chen@mediatek.corp-partner.google.com Gerrit-Attention: jitao shi jitao.shi@mediatek.com Gerrit-Attention: Yu-Ping Wu yupingso@google.com Gerrit-Comment-Date: Thu, 25 Mar 2021 07:53:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shaoming Chen shaoming.chen@mediatek.corp-partner.google.com Comment-In-Reply-To: Yu-Ping Wu yupingso@google.com Gerrit-MessageType: comment

Yu-Ping Wu (Code Review)

8:39 a.m.

New subject: Change in coreboot[master]: drivers/analogix: Increase the clock tolerance from 0.1% to 2%

Attention is currently required from: Shaoming Chen, jitao shi. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39025 )

Change subject: drivers/analogix: Increase the clock tolerance from 0.1% to 2% ......................................................................

Patch Set 5: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/39025 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4af96f58876932175b28fc0a8543720ebd7b5deb Gerrit-Change-Number: 39025 Gerrit-PatchSet: 5 Gerrit-Owner: jitao shi jitao.shi@mediatek.com Gerrit-Reviewer: Hung-Te Lin hungte@chromium.org Gerrit-Reviewer: Yu-Ping Wu yupingso@google.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Chen-Tsung Hsieh chentsung@chromium.org Gerrit-CC: Chen-Tsung Hsieh chentsung@google.com Gerrit-CC: Shaoming Chen shaoming.chen@mediatek.corp-partner.google.com Gerrit-Attention: Shaoming Chen shaoming.chen@mediatek.corp-partner.google.com Gerrit-Attention: jitao shi jitao.shi@mediatek.com Gerrit-Comment-Date: Thu, 25 Mar 2021 08:39:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Hung-Te Lin (Code Review)

26 Mar 26 Mar

2:39 a.m.

New subject: Change in coreboot[master]: drivers/analogix: Increase the clock tolerance from 0.1% to 2%

Attention is currently required from: Chen-Tsung Hsieh, Shaoming Chen, jitao shi. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39025 )

Change subject: drivers/analogix: Increase the clock tolerance from 0.1% to 2% ......................................................................

Patch Set 5:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/39025/comment/ae66dae4_b277acf0 PS1, Line 11: BUG=b:149051882

...

BUG=b:149051882, b:173603645

Ack

-- To view, visit https://review.coreboot.org/c/coreboot/+/39025 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4af96f58876932175b28fc0a8543720ebd7b5deb Gerrit-Change-Number: 39025 Gerrit-PatchSet: 5 Gerrit-Owner: jitao shi jitao.shi@mediatek.com Gerrit-Reviewer: Hung-Te Lin hungte@chromium.org Gerrit-Reviewer: Yu-Ping Wu yupingso@google.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Chen-Tsung Hsieh chentsung@chromium.org Gerrit-CC: Chen-Tsung Hsieh chentsung@google.com Gerrit-CC: Shaoming Chen shaoming.chen@mediatek.corp-partner.google.com Gerrit-Attention: Chen-Tsung Hsieh chentsung@google.com Gerrit-Attention: Chen-Tsung Hsieh chentsung@chromium.org Gerrit-Attention: Shaoming Chen shaoming.chen@mediatek.corp-partner.google.com Gerrit-Attention: jitao shi jitao.shi@mediatek.com Gerrit-Comment-Date: Fri, 26 Mar 2021 02:39:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Chen-Tsung Hsieh chentsung@chromium.org Comment-In-Reply-To: Chen-Tsung Hsieh chentsung@google.com Gerrit-MessageType: comment

Hung-Te Lin (Code Review)

27 Mar 27 Mar

10:02 a.m.

New subject: Change in coreboot[master]: drivers/analogix: Increase the clock tolerance from 0.1% to 2%

Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39025 )

Change subject: drivers/analogix: Increase the clock tolerance from 0.1% to 2% ......................................................................

drivers/analogix: Increase the clock tolerance from 0.1% to 2%

Increase the input tolerance to avoid panel scroll.

BUG=b:173603645 BRANCH=kukui TEST=None

Change-Id: I4af96f58876932175b28fc0a8543720ebd7b5deb Signed-off-by: Jitao Shi jitao.shi@mediatek.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/39025 Reviewed-by: Yu-Ping Wu yupingso@google.com Reviewed-by: Hung-Te Lin hungte@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/drivers/analogix/anx7625/anx7625.c 1 file changed, 1 insertion(+), 1 deletion(-)

Approvals: build bot (Jenkins): Verified Hung-Te Lin: Looks good to me, but someone else must approve Yu-Ping Wu: Looks good to me, approved

diff --git a/src/drivers/analogix/anx7625/anx7625.c b/src/drivers/analogix/anx7625/anx7625.c index 9f0b2e1..e37e047 100644 --- a/src/drivers/analogix/anx7625/anx7625.c +++ b/src/drivers/analogix/anx7625/anx7625.c @@ -381,7 +381,7 @@ ret |= anx7625_reg_write(bus, RX_P1_ADDR, MIPI_PLL_N_NUM_7_0, (n & 0xff)); /* diff */ - ret |= anx7625_reg_write(bus, RX_P1_ADDR, MIPI_DIGITAL_ADJ_1, 0x37); + ret |= anx7625_reg_write(bus, RX_P1_ADDR, MIPI_DIGITAL_ADJ_1, 0x3d);

ret |= anx7625_odfc_config(bus, post_divider - 1);

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participants (6)

Chen-Tsung Hsieh (Code Review)
Hung-Te Lin (Code Review)
Jitao Shi (Code Review)
jitao shi (Code Review)
Shaoming Chen (Code Review)
Yu-Ping Wu (Code Review)