Change in ...coreboot[master]: mb/emulation/qemu-riscv: Support arbitrary ROM sizes

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33412

Change subject: mb/emulation/qemu-riscv: Support arbitrary ROM sizes
......................................................................

mb/emulation/qemu-riscv: Support arbitrary ROM sizes

Make the linker script dynamic to support non default ROM sizes.
Prevents weird runtime issues due to stages overwriting parts of the
CBFS while decompressing stages.

Change-Id: I37b9187c719b907959f02a272ec0459aabbcda3c
Signed-off-by: Patrick Rudolph 
---
M src/mainboard/emulation/qemu-riscv/memlayout.ld
1 file changed, 7 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/33412/1

diff --git a/src/mainboard/emulation/qemu-riscv/memlayout.ld b/src/mainboard/emulation/qemu-riscv/memlayout.ld
index 032fbdd..57a7da4 100644
--- a/src/mainboard/emulation/qemu-riscv/memlayout.ld
+++ b/src/mainboard/emulation/qemu-riscv/memlayout.ld
@@ -17,13 +17,16 @@
 #include <arch/header.ld>

#define START 0x80000000
+//Stages start after CBFS in DRAM
+#define STAGES_START (START + CONFIG_COREBOOT_ROMSIZE_KB * 1024)

SECTIONS
 {
    DRAM_START(START)
    BOOTBLOCK(START, 64K)
-	STACK(START + 4M, 4K)
-	ROMSTAGE(START + 4M + 64K, 128K)
-	PRERAM_CBMEM_CONSOLE(START + 4M + 192K, 8K)
-	RAMSTAGE(START + 4M + 200K, 16M)
+	// CBFS goes here
+	STACK(STAGES_START, 4K)
+	ROMSTAGE(STAGES_START + 64K, 128K)
+	PRERAM_CBMEM_CONSOLE(STAGES_START + 192K, 8K)
+	RAMSTAGE(STAGES_START + 200K, 16M)
 }

[Philipp Hug (Code Review)]

Philipp Hug has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33412 )

Change subject: mb/emulation/qemu-riscv: Support arbitrary ROM sizes
......................................................................

Patch Set 1: Code-Review+2

Thanks!

[Patrick Rudolph (Code Review)]

Hello ron minnich, build bot (Jenkins), Philipp Hug, Xiang Wang,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/33412

to look at the new patch set (#2).

Change subject: mb/emulation/qemu-riscv: Support arbitrary ROM sizes
......................................................................

mb/emulation/qemu-riscv: Support arbitrary ROM sizes

Make the linker script dynamic to support non default ROM sizes.
Prevents weird runtime issues due to stages overwriting parts of the
CBFS while decompressing stages.

Change-Id: I37b9187c719b907959f02a272ec0459aabbcda3c
Signed-off-by: Patrick Rudolph 
---
M src/mainboard/emulation/qemu-riscv/memlayout.ld
1 file changed, 10 insertions(+), 7 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/33412/2

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33412 )

Change subject: mb/emulation/qemu-riscv: Support arbitrary ROM sizes
......................................................................

Patch Set 2:

Use defines from memlayout.h and CONFIG_ROM_SIZE

[Philipp Hug (Code Review)]

Philipp Hug has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33412 )

Change subject: mb/emulation/qemu-riscv: Support arbitrary ROM sizes
......................................................................

Patch Set 2: Code-Review+2

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33412 )

Change subject: mb/emulation/qemu-riscv: Support arbitrary ROM sizes
......................................................................

mb/emulation/qemu-riscv: Support arbitrary ROM sizes

Make the linker script dynamic to support non default ROM sizes.
Prevents weird runtime issues due to stages overwriting parts of the
CBFS while decompressing stages.

Change-Id: I37b9187c719b907959f02a272ec0459aabbcda3c
Signed-off-by: Patrick Rudolph 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33412
Tested-by: build bot (Jenkins) 
Reviewed-by: Philipp Hug 
---
M src/mainboard/emulation/qemu-riscv/memlayout.ld
1 file changed, 10 insertions(+), 7 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Philipp Hug: Looks good to me, approved

diff --git a/src/mainboard/emulation/qemu-riscv/memlayout.ld b/src/mainboard/emulation/qemu-riscv/memlayout.ld
index 032fbdd..7f8ec3d 100644
--- a/src/mainboard/emulation/qemu-riscv/memlayout.ld
+++ b/src/mainboard/emulation/qemu-riscv/memlayout.ld
@@ -15,15 +15,18 @@

#include <memlayout.h>
 #include <arch/header.ld>
+#include <mainboard/addressmap.h>

-#define START 0x80000000
+//Stages start after CBFS in DRAM
+#define STAGES_START (QEMU_VIRT_DRAM + CONFIG_ROM_SIZE)

SECTIONS
 {
-	DRAM_START(START)
-	BOOTBLOCK(START, 64K)
-	STACK(START + 4M, 4K)
-	ROMSTAGE(START + 4M + 64K, 128K)
-	PRERAM_CBMEM_CONSOLE(START + 4M + 192K, 8K)
-	RAMSTAGE(START + 4M + 200K, 16M)
+	DRAM_START(QEMU_VIRT_DRAM)
+	BOOTBLOCK(QEMU_VIRT_DRAM, 64K)
+	// CBFS goes here
+	STACK(STAGES_START, 4K)
+	ROMSTAGE(STAGES_START + 64K, 128K)
+	PRERAM_CBMEM_CONSOLE(STAGES_START + 192K, 8K)
+	RAMSTAGE(STAGES_START + 200K, 16M)
 }