[S] Change in coreboot[main]: Revert "src/cpu,soc/amd/common/block/cpu: Add preload_microcode"

[Maximilian Brune (Code Review)]

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier.

Maximilian Brune has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/87066?usp=email )

Change subject: Revert "src/cpu,soc/amd/common/block/cpu: Add preload_microcode"
......................................................................

Revert "src/cpu,soc/amd/common/block/cpu: Add preload_microcode"

This reverts commit 4b5a490b6f3faffe1880c731b50d1a4adabfb622.

Reason for revert: This effort was apparently given up on since 4 years.
So remove the function, since it is not used at the moment. If someone
wants to bring that effort back to live, said person can feel free to do
so.

Change-Id: I26d5c9fbfd6eae24f876d857a6e952ca0d1a64ae
Signed-off-by: Maximilian Brune 
---
M src/cpu/Makefile.mk
M src/include/cpu/amd/microcode.h
M src/soc/amd/common/block/cpu/update_microcode.c
3 files changed, 0 insertions(+), 19 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/87066/1

diff --git a/src/cpu/Makefile.mk b/src/cpu/Makefile.mk
index 0afe454..2ab8727 100644
--- a/src/cpu/Makefile.mk
+++ b/src/cpu/Makefile.mk
@@ -59,12 +59,7 @@

cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin
 cpu_microcode_blob.bin-type := microcode
-# The AMD LPC SPI DMA controller requires source files to be 64 byte aligned.
-ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA),y)
-cpu_microcode_blob.bin-align := 64
-else
 cpu_microcode_blob.bin-align := 16
-endif

ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),)
 cpu_microcode_blob.bin-COREBOOT-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC)
diff --git a/src/include/cpu/amd/microcode.h b/src/include/cpu/amd/microcode.h
index b6b158c..96cac59 100644
--- a/src/include/cpu/amd/microcode.h
+++ b/src/include/cpu/amd/microcode.h
@@ -7,6 +7,5 @@
 void amd_load_microcode_from_cbfs(void);
 void amd_free_microcode(void);
 void amd_apply_microcode_patch(void);
-void preload_microcode(void);

#endif /* CPU_AMD_MICROCODE_H */
diff --git a/src/soc/amd/common/block/cpu/update_microcode.c b/src/soc/amd/common/block/cpu/update_microcode.c
index 14c4f36..e80339b 100644
--- a/src/soc/amd/common/block/cpu/update_microcode.c
+++ b/src/soc/amd/common/block/cpu/update_microcode.c
@@ -119,16 +119,3 @@
    	ucode = NULL;
    }
 }
-
-void preload_microcode(void)
-{
-	if (!CONFIG(CBFS_PRELOAD))
-		return;
-
-	char name[] = CPU_MICROCODE_BLOB_NAME;
-	uint16_t equivalent_processor_rev_id = get_equivalent_processor_rev_id();
-
-	snprintf(name, sizeof(name), CPU_MICROCODE_BLOB_FORMAT, equivalent_processor_rev_id);
-	printk(BIOS_DEBUG, "Preloading microcode %s\n", name);
-	cbfs_preload(name);
-}