[S] Change in coreboot[main]: soc/intel: fix slp-s0 residency counter frequency _lpit table

[Sukumar Ghorai (Code Review)]

Attention is currently required from: Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Sukumar Ghorai, Tarun.

Hello Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/78164?usp=email

to look at the new patch set (#2).

Change subject: soc/intel: fix slp-s0 residency counter frequency _lpit table
......................................................................

soc/intel: fix slp-s0 residency counter frequency _lpit table

Intel platforms using Low Power Idle Table(LPIT) to enumerate platform
Low Power Idle states. Two types of low power residencies:
 a) CPU PKG C10 - read via MSR (Function fixed hardware interface)
 b) Platform Controller Hub (PCH) SLP_S0 - read via memory mapped
Ref.  https://www.uefi.org/sites/default/files/resources/
Intel_ACPI_Low_Power_S0_Idle.pdf

System sleep time i.e.,SLP_S0 signal asserted and counter measured
in count in 122μs granularity/tick.

BUG=b:300440936
TEST=check kernel cpuidle sysfs for sleep residency
  cat /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
  cat /sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us

Change-Id: I401dd4a09a67d81a9ea3a56cd22f1a681e2a9349
Signed-off-by: Sukumar Ghorai 
---
M src/include/acpi/acpi.h
M src/soc/intel/common/block/acpi/lpit.c
M src/soc/intel/meteorlake/Kconfig
3 files changed, 11 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/78164/2