the following patch was just integrated into master: commit 883f5cbdcea6e8e4dbca57ff0a430338c9159ed2 Author: Lin Huang hl@rock-chips.com Date: Thu Sep 15 22:59:55 2016 +0800
rockchip/rk3399: sdram: also prepare the index1 configuration
To enable DDR Dynamic Voltage and Frequency Scaling (DVFS) we need to train alternative configurations first, so do the training and store the values.
BUG=None BRANCH=None TEST=Boot from kevin
Change-Id: I944a4b297a4ed6966893aa09553da88171307a42 Signed-off-by: Patrick Georgi pgeorgi@chromium.org Original-Commit-Id: 94533ff3ba21bcb0ace00bedcf0cebb89a341be2 Original-Change-Id: I4a98bc0db5553d154fedb657e35b926a92aa80c7 Original-Signed-off-by: Lin Huang hl@rock-chips.com Original-Reviewed-on: https://chromium-review.googlesource.com/386596 Original-Commit-Ready: Douglas Anderson dianders@chromium.org Original-Reviewed-by: Derek Basehore dbasehore@chromium.org Original-Reviewed-by: Julius Werner jwerner@chromium.org Reviewed-on: https://review.coreboot.org/17104 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth martinroth@google.com
See https://review.coreboot.org/17104 for details.
-gerrit