Change in coreboot[master]: soc/amd/cezanne/data_fabric: add ACPI names and SSDT entries

[Felix Held (Code Review)]

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50706 )

Change subject: soc/amd/cezanne/data_fabric: add ACPI names and SSDT entries
......................................................................

soc/amd/cezanne/data_fabric: add ACPI names and SSDT entries

Additionally to the PCI IDs of Cezanne it also handles the Renoir ones.
The main difference between those two is that Renoir has two core
complexes while Cezanne only has one core complex. I haven't seen
incompatible changes between those two though, so for example the fabric
IDs are the same and the one that's only present in Renoir is just not
used in Cezanne. Also adding the ACPI parts for those don't have
anything to do with those differences.

Signed-off-by: Felix Held 
Change-Id: I3b2517bc15d872f41183a33857333f1972ff2cb9
---
M src/soc/amd/cezanne/data_fabric.c
1 file changed, 73 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/50706/1

diff --git a/src/soc/amd/cezanne/data_fabric.c b/src/soc/amd/cezanne/data_fabric.c
index b4bf618..d603c8a 100644
--- a/src/soc/amd/cezanne/data_fabric.c
+++ b/src/soc/amd/cezanne/data_fabric.c
@@ -1,8 +1,12 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

+#include <acpi/acpi_device.h>
 #include <amdblocks/data_fabric.h>
 #include <console/console.h>
 #include <cpu/x86/lapic_def.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
 #include <soc/data_fabric.h>
 #include <soc/iomap.h>
 #include <types.h>
@@ -93,3 +97,72 @@

data_fabric_print_mmio_conf();
 }
+
+static const char *data_fabric_acpi_name(const struct device *dev)
+{
+	switch (dev->device) {
+	case PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF0:
+	case PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF0:
+		return "DFD0";
+	case PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF1:
+	case PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF1:
+		return "DFD1";
+	case PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF2:
+	case PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF2:
+		return "DFD2";
+	case PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF3:
+	case PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF3:
+		return "DFD3";
+	case PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF4:
+	case PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF4:
+		return "DFD4";
+	case PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF5:
+	case PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF5:
+		return "DFD5";
+	case PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF6:
+	case PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF6:
+		return "DFD6";
+	case PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF7:
+	case PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF7:
+		return "DFD7";
+	default:
+		printk(BIOS_ERR, "%s: Unhandled device id 0x%x\n", __func__, dev->device);
+	}
+
+	return NULL;
+}
+
+static struct device_operations data_fabric_ops = {
+	.read_resources		= noop_read_resources,
+	.set_resources		= noop_set_resources,
+	.acpi_name		= data_fabric_acpi_name,
+	.acpi_fill_ssdt		= acpi_device_write_pci_dev,
+};
+
+static const unsigned short pci_device_ids[] = {
+	/* Renoir DF devices */
+	PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF0,
+	PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF1,
+	PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF2,
+	PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF3,
+	PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF4,
+	PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF5,
+	PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF6,
+	PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF7,
+	/* Cezanne DF devices */
+	PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF0,
+	PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF1,
+	PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF2,
+	PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF3,
+	PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF4,
+	PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF5,
+	PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF6,
+	PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF7,
+	0
+};
+
+static const struct pci_driver data_fabric_driver __pci_driver = {
+	.ops			= &data_fabric_ops,
+	.vendor			= PCI_VENDOR_ID_AMD,
+	.devices		= pci_device_ids,
+};