HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43706 )
Change subject: src/soc/amd: Add include <types.h> ......................................................................
src/soc/amd: Add include <types.h>
BIT(x) needs <types.h>.
Change-Id: Icaeda969cae52d9c62d976db4ead0e734efa838c Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/soc/amd/common/block/include/amdblocks/gpio_banks.h M src/soc/amd/common/block/include/amdblocks/spi.h M src/soc/amd/common/block/spi/fch_spi_ctrl.c M src/soc/amd/picasso/include/soc/i2c.h M src/soc/amd/stoneyridge/include/soc/i2c.h 5 files changed, 6 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/43706/1
diff --git a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h index 7a9638d9..eea7a979 100644 --- a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h +++ b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h @@ -3,9 +3,7 @@ #ifndef __AMDBLOCK_GPIO_BANKS_H__ #define __AMDBLOCK_GPIO_BANKS_H__
-#include <stdint.h> -#include <stdbool.h> -#include <stddef.h> +#include <types.h>
struct soc_amd_gpio { uint8_t gpio; diff --git a/src/soc/amd/common/block/include/amdblocks/spi.h b/src/soc/amd/common/block/include/amdblocks/spi.h index d226e0c..eb8c90a 100644 --- a/src/soc/amd/common/block/include/amdblocks/spi.h +++ b/src/soc/amd/common/block/include/amdblocks/spi.h @@ -3,6 +3,8 @@ #ifndef __AMDBLOCKS_SPI_H__ #define __AMDBLOCKS_SPI_H__
+#include <types.h> + #define SPI_CNTRL0 0x00 #define SPI_BUSY BIT(31)
diff --git a/src/soc/amd/common/block/spi/fch_spi_ctrl.c b/src/soc/amd/common/block/spi/fch_spi_ctrl.c index 13ad0cd..2be3b1a 100644 --- a/src/soc/amd/common/block/spi/fch_spi_ctrl.c +++ b/src/soc/amd/common/block/spi/fch_spi_ctrl.c @@ -9,6 +9,7 @@ #include <device/pci_ops.h> #include <lib.h> #include <timer.h> +#include <types.h>
#define GRANULARITY_TEST_4k 0x0000f000 /* bits 15-12 */ #define WORD_TO_DWORD_UPPER(x) ((x << 16) & 0xffff0000) diff --git a/src/soc/amd/picasso/include/soc/i2c.h b/src/soc/amd/picasso/include/soc/i2c.h index 20084f0..c1dd6ef 100644 --- a/src/soc/amd/picasso/include/soc/i2c.h +++ b/src/soc/amd/picasso/include/soc/i2c.h @@ -3,6 +3,7 @@ #ifndef __PICASSO_I2C_H__ #define __PICASSO_I2C_H__
+#include <types.h> #include <soc/gpio.h>
struct soc_amd_i2c_save { diff --git a/src/soc/amd/stoneyridge/include/soc/i2c.h b/src/soc/amd/stoneyridge/include/soc/i2c.h index 844ff1b..63db7d4 100644 --- a/src/soc/amd/stoneyridge/include/soc/i2c.h +++ b/src/soc/amd/stoneyridge/include/soc/i2c.h @@ -3,6 +3,7 @@ #ifndef __STONEYRIDGE_I2C_H__ #define __STONEYRIDGE_I2C_H__
+#include <types.h> #include <soc/gpio.h>
struct soc_amd_i2c_save {
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43706 )
Change subject: src/soc/amd: Add include <types.h> ......................................................................
Patch Set 1:
(5 comments)
I've dded some comments to make the review easy
https://review.coreboot.org/c/coreboot/+/43706/1/src/soc/amd/common/block/in... File src/soc/amd/common/block/include/amdblocks/gpio_banks.h:
https://review.coreboot.org/c/coreboot/+/43706/1/src/soc/amd/common/block/in... PS1, Line 21: BIT(28) needs <types.h>
https://review.coreboot.org/c/coreboot/+/43706/1/src/soc/amd/common/block/in... File src/soc/amd/common/block/include/amdblocks/spi.h:
https://review.coreboot.org/c/coreboot/+/43706/1/src/soc/amd/common/block/in... PS1, Line 25: BIT(30) needs <types.h>
https://review.coreboot.org/c/coreboot/+/43706/1/src/soc/amd/common/block/sp... File src/soc/amd/common/block/spi/fch_spi_ctrl.c:
https://review.coreboot.org/c/coreboot/+/43706/1/src/soc/amd/common/block/sp... PS1, Line 23: BIT(7) needs <types.h>
https://review.coreboot.org/c/coreboot/+/43706/1/src/soc/amd/picasso/include... File src/soc/amd/picasso/include/soc/i2c.h:
https://review.coreboot.org/c/coreboot/+/43706/1/src/soc/amd/picasso/include... PS1, Line 14: BIT(2) needs <types.h>
https://review.coreboot.org/c/coreboot/+/43706/1/src/soc/amd/stoneyridge/inc... File src/soc/amd/stoneyridge/include/soc/i2c.h:
https://review.coreboot.org/c/coreboot/+/43706/1/src/soc/amd/stoneyridge/inc... PS1, Line 14: BIT(0) needs <types.h>
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43706 )
Change subject: src/soc/amd: Add include <types.h> ......................................................................
Patch Set 1: Code-Review+2
Patch Set 1:
(5 comments)
I've dded some comments to make the review easy
I didn't know you could use dd to put comments on gerrit
Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43706
to look at the new patch set (#2).
Change subject: src/soc/amd: Add include <types.h> ......................................................................
src/soc/amd: Add include <types.h>
BIT(x) needs <types.h>.
Change-Id: Icaeda969cae52d9c62d976db4ead0e734efa838c Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/soc/amd/common/block/include/amdblocks/gpio_banks.h M src/soc/amd/common/block/include/amdblocks/spi.h M src/soc/amd/common/block/spi/fch_spi_ctrl.c M src/soc/amd/picasso/include/soc/i2c.h M src/soc/amd/stoneyridge/include/soc/i2c.h 5 files changed, 5 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/43706/2
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43706 )
Change subject: src/soc/amd: Add include <types.h> ......................................................................
Patch Set 2:
(5 comments)
comments added to make the review easy
https://review.coreboot.org/c/coreboot/+/43706/2/src/soc/amd/common/block/in... File src/soc/amd/common/block/include/amdblocks/gpio_banks.h:
https://review.coreboot.org/c/coreboot/+/43706/2/src/soc/amd/common/block/in... PS2, Line 21: BIT types.h
https://review.coreboot.org/c/coreboot/+/43706/2/src/soc/amd/common/block/in... File src/soc/amd/common/block/include/amdblocks/spi.h:
https://review.coreboot.org/c/coreboot/+/43706/2/src/soc/amd/common/block/in... PS2, Line 9: BIT( types.h
https://review.coreboot.org/c/coreboot/+/43706/2/src/soc/amd/common/block/sp... File src/soc/amd/common/block/spi/fch_spi_ctrl.c:
https://review.coreboot.org/c/coreboot/+/43706/2/src/soc/amd/common/block/sp... PS2, Line 23: BIT types.h
https://review.coreboot.org/c/coreboot/+/43706/2/src/soc/amd/picasso/include... File src/soc/amd/picasso/include/soc/i2c.h:
https://review.coreboot.org/c/coreboot/+/43706/2/src/soc/amd/picasso/include... PS2, Line 14: BIT types.h
https://review.coreboot.org/c/coreboot/+/43706/2/src/soc/amd/stoneyridge/inc... File src/soc/amd/stoneyridge/include/soc/i2c.h:
https://review.coreboot.org/c/coreboot/+/43706/2/src/soc/amd/stoneyridge/inc... PS2, Line 14: BIT types.h
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43706 )
Change subject: src/soc/amd: Add include <types.h> ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43706 )
Change subject: src/soc/amd: Add include <types.h> ......................................................................
src/soc/amd: Add include <types.h>
BIT(x) needs <types.h>.
Change-Id: Icaeda969cae52d9c62d976db4ead0e734efa838c Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/43706 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/soc/amd/common/block/include/amdblocks/gpio_banks.h M src/soc/amd/common/block/include/amdblocks/spi.h M src/soc/amd/common/block/spi/fch_spi_ctrl.c M src/soc/amd/picasso/include/soc/i2c.h M src/soc/amd/stoneyridge/include/soc/i2c.h 5 files changed, 5 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h index 11e1246..fdcd0f8 100644 --- a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h +++ b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h @@ -3,9 +3,7 @@ #ifndef __AMDBLOCK_GPIO_BANKS_H__ #define __AMDBLOCK_GPIO_BANKS_H__
-#include <stdint.h> -#include <stdbool.h> -#include <stddef.h> +#include <types.h>
struct soc_amd_gpio { uint8_t gpio; diff --git a/src/soc/amd/common/block/include/amdblocks/spi.h b/src/soc/amd/common/block/include/amdblocks/spi.h index 576f0c6..b0080da 100644 --- a/src/soc/amd/common/block/include/amdblocks/spi.h +++ b/src/soc/amd/common/block/include/amdblocks/spi.h @@ -3,7 +3,7 @@ #ifndef __AMDBLOCKS_SPI_H__ #define __AMDBLOCKS_SPI_H__
-#include <stdint.h> +#include <types.h>
#define SPI_CNTRL0 0x00 #define SPI_BUSY BIT(31) diff --git a/src/soc/amd/common/block/spi/fch_spi_ctrl.c b/src/soc/amd/common/block/spi/fch_spi_ctrl.c index 1e0c31a..565fdbe 100644 --- a/src/soc/amd/common/block/spi/fch_spi_ctrl.c +++ b/src/soc/amd/common/block/spi/fch_spi_ctrl.c @@ -8,6 +8,7 @@ #include <device/pci_ops.h> #include <lib.h> #include <timer.h> +#include <types.h>
#define GRANULARITY_TEST_4k 0x0000f000 /* bits 15-12 */ #define WORD_TO_DWORD_UPPER(x) ((x << 16) & 0xffff0000) diff --git a/src/soc/amd/picasso/include/soc/i2c.h b/src/soc/amd/picasso/include/soc/i2c.h index 20084f0..c1dd6ef 100644 --- a/src/soc/amd/picasso/include/soc/i2c.h +++ b/src/soc/amd/picasso/include/soc/i2c.h @@ -3,6 +3,7 @@ #ifndef __PICASSO_I2C_H__ #define __PICASSO_I2C_H__
+#include <types.h> #include <soc/gpio.h>
struct soc_amd_i2c_save { diff --git a/src/soc/amd/stoneyridge/include/soc/i2c.h b/src/soc/amd/stoneyridge/include/soc/i2c.h index 844ff1b..63db7d4 100644 --- a/src/soc/amd/stoneyridge/include/soc/i2c.h +++ b/src/soc/amd/stoneyridge/include/soc/i2c.h @@ -3,6 +3,7 @@ #ifndef __STONEYRIDGE_I2C_H__ #define __STONEYRIDGE_I2C_H__
+#include <types.h> #include <soc/gpio.h>
struct soc_amd_i2c_save {