Change in coreboot[master]: soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to ...

[Subrata Banik (Code Review)]

Attention is currently required from: Furquan Shaikh, Mariusz Szafrański, Suresh Bellampalli, Tim Wawrzynczak, Vanessa Eusebio, Angel Pons, Michal Motyl, Andrey Petrov, Patrick Rudolph.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51767 )

Change subject: soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.h
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Patch Set 9:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/51767/comment/793e9163_c8941121 
PS8, Line 11: 2. An advanced GPIO PM capabilities has been introduced in CNP PCH.
> This statement looks incomplete.

Ack

https://review.coreboot.org/c/coreboot/+/51767/comment/429dcfc3_e1946426 
PS8, Line 19: MISCCFG bit definitions from intelblock/gpio.h
            : to soc/gpio.h
> bit definitions are kept in intelblock/gpio. […]

Ack