Change in coreboot[master]: nb/intel/sandybridge: Always write to PEGCTL

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39624 )

Change subject: nb/intel/sandybridge: Always write to PEGCTL
......................................................................

nb/intel/sandybridge: Always write to PEGCTL

This register needs to be written to once to lock it down. Do so.

Change-Id: I04bd496d064940b51cb9aa1ded6f5b8853ea7334
Signed-off-by: Angel Pons 
---
M src/northbridge/intel/sandybridge/northbridge.c
1 file changed, 3 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/39624/1

diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 23c1489..abfc125 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -377,11 +377,12 @@
    	/*
    	 * Set the PEG clock gating bit. Disables the IO clock on all PEG devices.
    	 *
-		 * FIXME: If not clock gating, this register still needs to be written to once,
-		 *        to lock it down. Also, never clock gate on Ivy Bridge stepping A0!
+		 * FIXME: Never clock gate on Ivy Bridge stepping A0!
    	 */
    	MCHBAR32_OR(PEGCTL, 1);
    	printk(BIOS_DEBUG, "Disabling PEG IO clock.\n");
+	} else {
+		MCHBAR32_AND(PEGCTL, ~1);
    }
 }

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39624 )

Change subject: nb/intel/sandybridge: Always write to PEGCTL
......................................................................

Patch Set 2: Code-Review+2

[Felix Held (Code Review)]

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39624 )

Change subject: nb/intel/sandybridge: Always write to PEGCTL
......................................................................

Patch Set 2: Code-Review+2

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39624 )

Change subject: nb/intel/sandybridge: Always write to PEGCTL
......................................................................

nb/intel/sandybridge: Always write to PEGCTL

This register needs to be written to once to lock it down. Do so.

Change-Id: I04bd496d064940b51cb9aa1ded6f5b8853ea7334
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39624
Reviewed-by: Arthur Heymans 
Reviewed-by: Felix Held 
Tested-by: build bot (Jenkins) 
---
M src/northbridge/intel/sandybridge/northbridge.c
1 file changed, 3 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Felix Held: Looks good to me, approved
  Arthur Heymans: Looks good to me, approved

diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 23c1489..abfc125 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -377,11 +377,12 @@
    	/*
    	 * Set the PEG clock gating bit. Disables the IO clock on all PEG devices.
    	 *
-		 * FIXME: If not clock gating, this register still needs to be written to once,
-		 *        to lock it down. Also, never clock gate on Ivy Bridge stepping A0!
+		 * FIXME: Never clock gate on Ivy Bridge stepping A0!
    	 */
    	MCHBAR32_OR(PEGCTL, 1);
    	printk(BIOS_DEBUG, "Disabling PEG IO clock.\n");
+	} else {
+		MCHBAR32_AND(PEGCTL, ~1);
    }
 }