Change in coreboot[master]: soc/intel/{skl,apl}: don't run or even include SGX code if disabled
Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58426 )
Change subject: soc/intel/{skl,apl}: don't run or even include SGX code if disabled ......................................................................
soc/intel/{skl,apl}: don't run or even include SGX code if disabled
Do not run or include any code in case the user did not explicitly enable SGX through `SOC_INTEL_COMMON_BLOCK_SGX_ENABLE`.
Also move the ifdef inside the ASL file.
Change-Id: Iec4d3d3eb2811ec14d29aff9601ba325724bc28c Signed-off-by: Michael Niewöhner foss@mniewoehner.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/58426 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Felix Singer felixsinger@posteo.net --- M src/soc/intel/apollolake/acpi.c M src/soc/intel/apollolake/acpi/southbridge.asl M src/soc/intel/common/acpi/sgx.asl M src/soc/intel/common/block/sgx/Makefile.inc M src/soc/intel/skylake/acpi/pch.asl 5 files changed, 4 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Felix Singer: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c index 6e3bde4..4f5029e 100644 --- a/src/soc/intel/apollolake/acpi.c +++ b/src/soc/intel/apollolake/acpi.c @@ -88,7 +88,7 @@ gnvs->scdo = gpio_acpi_pin(cfg->sdcard_cd_gpio); }
- if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX)) + if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE)) sgx_fill_gnvs(gnvs);
/* Fill in Above 4GB MMIO resource */ diff --git a/src/soc/intel/apollolake/acpi/southbridge.asl b/src/soc/intel/apollolake/acpi/southbridge.asl index f4d1497..f857bb9 100644 --- a/src/soc/intel/apollolake/acpi/southbridge.asl +++ b/src/soc/intel/apollolake/acpi/southbridge.asl @@ -30,6 +30,4 @@ #include <soc/intel/common/acpi/pci_osc.asl>
/* SGX */ -#if CONFIG(SOC_INTEL_COMMON_BLOCK_SGX) #include <soc/intel/common/acpi/sgx.asl> -#endif diff --git a/src/soc/intel/common/acpi/sgx.asl b/src/soc/intel/common/acpi/sgx.asl index c0b8040..9aea7a8 100644 --- a/src/soc/intel/common/acpi/sgx.asl +++ b/src/soc/intel/common/acpi/sgx.asl @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#if CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE) Scope(_SB) { // Secure Enclave memory @@ -54,3 +55,4 @@
} // end EPC Device } // End of Scope(_SB) +#endif diff --git a/src/soc/intel/common/block/sgx/Makefile.inc b/src/soc/intel/common/block/sgx/Makefile.inc index 3fa18d8..ce3c436 100644 --- a/src/soc/intel/common/block/sgx/Makefile.inc +++ b/src/soc/intel/common/block/sgx/Makefile.inc @@ -1 +1 @@ -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX) += sgx.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE) += sgx.c diff --git a/src/soc/intel/skylake/acpi/pch.asl b/src/soc/intel/skylake/acpi/pch.asl index e088ca1..0aa8f95 100644 --- a/src/soc/intel/skylake/acpi/pch.asl +++ b/src/soc/intel/skylake/acpi/pch.asl @@ -62,6 +62,4 @@ }
/* SGX */ -#if CONFIG(SOC_INTEL_COMMON_BLOCK_SGX) #include <soc/intel/common/acpi/sgx.asl> -#endif
-
Felix Singer (Code Review)