[S] Change in coreboot[master]: soc/amd/*/root_complex: reserve PCI config IO ports

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75556?usp=email )

Change subject: soc/amd/*/root_complex: reserve PCI config IO ports
......................................................................

soc/amd/*/root_complex: reserve PCI config IO ports

This makes sure that the resource allocator won't use those ports for
anything else.

Signed-off-by: Felix Held 
Change-Id: Ie42260902ee2b383dd5867ac813cae029f706f2d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75556
Tested-by: build bot (Jenkins) 
Reviewed-by: Nico Huber 
Reviewed-by: Raul Rangel 
---
M src/soc/amd/cezanne/root_complex.c
M src/soc/amd/glinda/root_complex.c
M src/soc/amd/mendocino/root_complex.c
M src/soc/amd/phoenix/root_complex.c
M src/soc/amd/picasso/root_complex.c
5 files changed, 10 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, but someone else must approve
  Raul Rangel: Looks good to me, approved

diff --git a/src/soc/amd/cezanne/root_complex.c b/src/soc/amd/cezanne/root_complex.c
index 6bef915..a4134ef 100644
--- a/src/soc/amd/cezanne/root_complex.c
+++ b/src/soc/amd/cezanne/root_complex.c
@@ -115,6 +115,8 @@
    /* The root complex has no PCI BARs implemented, so there's no need to call
       pci_dev_read_resources for it */

+	fixed_io_range_reserved(dev, idx++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
+
    /* 0x0 - 0x9ffff */
    ram_resource_kb(dev, idx++, 0, 0xa0000 / KiB);

diff --git a/src/soc/amd/glinda/root_complex.c b/src/soc/amd/glinda/root_complex.c
index a8b54e2..9cb758a 100644
--- a/src/soc/amd/glinda/root_complex.c
+++ b/src/soc/amd/glinda/root_complex.c
@@ -130,6 +130,8 @@
    /* The root complex has no PCI BARs implemented, so there's no need to call
       pci_dev_read_resources for it */

+	fixed_io_range_reserved(dev, idx++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
+
    /* 0x0 - 0x9ffff */
    ram_resource_kb(dev, idx++, 0, 0xa0000 / KiB);

diff --git a/src/soc/amd/mendocino/root_complex.c b/src/soc/amd/mendocino/root_complex.c
index 53a245b..11f111f 100644
--- a/src/soc/amd/mendocino/root_complex.c
+++ b/src/soc/amd/mendocino/root_complex.c
@@ -158,6 +158,8 @@
    /* The root complex has no PCI BARs implemented, so there's no need to call
       pci_dev_read_resources for it */

+	fixed_io_range_reserved(dev, idx++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
+
    /* 0x0 - 0x9ffff */
    ram_resource_kb(dev, idx++, 0, 0xa0000 / KiB);

diff --git a/src/soc/amd/phoenix/root_complex.c b/src/soc/amd/phoenix/root_complex.c
index 83fb047..3c754c6 100644
--- a/src/soc/amd/phoenix/root_complex.c
+++ b/src/soc/amd/phoenix/root_complex.c
@@ -130,6 +130,8 @@
    /* The root complex has no PCI BARs implemented, so there's no need to call
       pci_dev_read_resources for it */

+	fixed_io_range_reserved(dev, idx++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
+
    /* 0x0 - 0x9ffff */
    ram_resource_kb(dev, idx++, 0, 0xa0000 / KiB);

diff --git a/src/soc/amd/picasso/root_complex.c b/src/soc/amd/picasso/root_complex.c
index 5ea8b79..65021a3 100644
--- a/src/soc/amd/picasso/root_complex.c
+++ b/src/soc/amd/picasso/root_complex.c
@@ -115,6 +115,8 @@
    /* The root complex has no PCI BARs implemented, so there's no need to call
       pci_dev_read_resources for it */

+	fixed_io_range_reserved(dev, idx++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
+
    /* 0x0 - 0x9ffff */
    ram_resource_kb(dev, idx++, 0, 0xa0000 / KiB);