Hello Felix Singer, V Sowmya, Nico Huber, Furquan Shaikh, Tim Wawrzynczak, Subrata Banik, Arthur Heymans, Michael Niewöhner, Patrick Rudolph,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/48572
to review the following change.
Change subject: soc/intel/tigerlake: Drop unreferenced devicetree settings ......................................................................
soc/intel/tigerlake: Drop unreferenced devicetree settings
No mainboard uses these settings, nor does SoC code. Drop them.
Change-Id: I5f5da8dfcec7dd35981611830b555cab5d6af3e3 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/tigerlake/chip.h 1 file changed, 0 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/48572/1
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h index 5c124de..fe10d0d 100644 --- a/src/soc/intel/tigerlake/chip.h +++ b/src/soc/intel/tigerlake/chip.h @@ -263,10 +263,8 @@ uint8_t SmbusEnable;
/* Gfx related */ - uint8_t IgdDvmt50PreAlloc; uint8_t SkipExtGfxScan;
- uint32_t GraphicsConfigPtr; uint8_t Device4Enable;
/* HeciEnabled decides the state of Heci1 at end of boot
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48572 )
Change subject: soc/intel/tigerlake: Drop unreferenced devicetree settings ......................................................................
Patch Set 2: Code-Review+2
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48572 )
Change subject: soc/intel/tigerlake: Drop unreferenced devicetree settings ......................................................................
Patch Set 3:
Needs rebase onto CB:48579
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48572 )
Change subject: soc/intel/tigerlake: Drop unreferenced devicetree settings ......................................................................
Patch Set 3: Code-Review+1
Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48572 )
Change subject: soc/intel/tigerlake: Drop unreferenced devicetree settings ......................................................................
soc/intel/tigerlake: Drop unreferenced devicetree settings
No mainboard uses these settings, nor does SoC code. Drop them.
Change-Id: I5f5da8dfcec7dd35981611830b555cab5d6af3e3 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/48572 Reviewed-by: Michael Niewöhner foss@mniewoehner.de Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/tigerlake/chip.h 1 file changed, 0 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Michael Niewöhner: Looks good to me, but someone else must approve
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h index 5c124de..fe10d0d 100644 --- a/src/soc/intel/tigerlake/chip.h +++ b/src/soc/intel/tigerlake/chip.h @@ -263,10 +263,8 @@ uint8_t SmbusEnable;
/* Gfx related */ - uint8_t IgdDvmt50PreAlloc; uint8_t SkipExtGfxScan;
- uint32_t GraphicsConfigPtr; uint8_t Device4Enable;
/* HeciEnabled decides the state of Heci1 at end of boot
-
Angel Pons (Code Review) -
Furquan Shaikh (Code Review)
-
Hung-Te Lin (Code Review)
-
Michael Niewöhner (Code Review)