Angel Pons would like Felix Singer, V Sowmya, Nico Huber, Furquan Shaikh, Tim Wawrzynczak, Subrata Banik, Arthur Heymans, Michael Niewöhner and Patrick Rudolph to review this change.
soc/intel/tigerlake: Drop unreferenced devicetree settings
No mainboard uses these settings, nor does SoC code. Drop them.
Change-Id: I5f5da8dfcec7dd35981611830b555cab5d6af3e3
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/soc/intel/tigerlake/chip.h
1 file changed, 0 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/48572/1
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index 5c124de..fe10d0d 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -263,10 +263,8 @@
uint8_t SmbusEnable;
/* Gfx related */
- uint8_t IgdDvmt50PreAlloc;
uint8_t SkipExtGfxScan;
- uint32_t GraphicsConfigPtr;
uint8_t Device4Enable;
/* HeciEnabled decides the state of Heci1 at end of boot
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