Change in coreboot[master]: soc/intel/tigerlake: Add FSP UPDs for minimum assertion widths

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44557 )

Change subject: soc/intel/tigerlake: Add FSP UPDs for minimum assertion widths
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Patch Set 2: Code-Review+1

(3 comments)

https://review.coreboot.org/c/coreboot/+/44557/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/44557/2//COMMIT_MSG@7 
PS2, Line 7: Add
I'd use `Hook up` instead

https://review.coreboot.org/c/coreboot/+/44557/2//COMMIT_MSG@9 
PS2, Line 9: Add
Same here

https://review.coreboot.org/c/coreboot/+/44557/2//COMMIT_MSG@10 
PS2, Line 10: P
lowercase `p`