Kane Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40399 )
Change subject: [test only]enable usb3 dbc ......................................................................
[test only]enable usb3 dbc
Signed-off-by: Kane Chen kane.chen@intel.com Change-Id: Ib9d95d1fd88bc48ca85023bcc2f99b4e868f94f4 --- M src/soc/intel/tigerlake/romstage/fsp_params.c 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/40399/1
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params.c index 9933200..3d64ed0 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params.c @@ -190,6 +190,8 @@
soc_memory_init_params(m_cfg, config); mainboard_memory_init_params(mupd); + m_cfg->PlatformDebugConsent = 3; + }
__weak void mainboard_memory_init_params(FSPM_UPD *mupd)