Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
mb/up/squared: Fill LPDDR4 dimm info
Fill the dimm info struct to make SMBIOS type 17 appear.
TODO: Find out how to read the memory sku id and support other boards that don't have 2GiB "K4F8E304HB-MGCJ".
Change-Id: I4de63362c8fea8a886594cdcf0eec48421afb605 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/mainboard/up/squared/romstage.c 1 file changed, 23 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/34564/1
diff --git a/src/mainboard/up/squared/romstage.c b/src/mainboard/up/squared/romstage.c index 2cfaa00..3235fab 100644 --- a/src/mainboard/up/squared/romstage.c +++ b/src/mainboard/up/squared/romstage.c @@ -94,3 +94,26 @@ memcpy(memupd->FspmConfig.Ch3_Bit_swizzling, &ch3_bit_swizzling, sizeof(ch3_bit_swizzling)); } + +static const struct lpddr4_sku skus[] = { + /* Samsung 280 K4F8E304HB-MGCJ 8Gb dual-ch */ + [0] = { + .speed = LP4_SPEED_2400, + .ch0_rank_density = LP4_8Gb_DENSITY, + .ch1_rank_density = LP4_8Gb_DENSITY, + .ch0_dual_rank = 0, + .ch1_dual_rank = 0, + .part_num = "K4F8E304HB-MGCJ", + }, +}; + +static const struct lpddr4_cfg lp4cfg = { + .skus = skus, + .num_skus = ARRAY_SIZE(skus), +}; + +void mainboard_save_dimm_info(void) +{ + /* FIXME: Add support for reading current memsku from GPIOs */ + save_lpddr4_dimm_info(&lp4cfg, 0); +}
Hello Christian Walter, Felix Singer, Philipp Deppenwiese, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34564
to look at the new patch set (#2).
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
mb/up/squared: Fill LPDDR4 dimm info
Fill the dimm info struct to make SMBIOS type 17 appear.
TODO: Find out how to read the memory sku id and support other boards that don't have 2GiB "K4F8E304HB-MGCJ".
Change-Id: I4de63362c8fea8a886594cdcf0eec48421afb605 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/mainboard/up/squared/romstage.c 1 file changed, 24 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/34564/2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
Patch Set 2: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/34564/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34564/2//COMMIT_MSG@12 PS2, Line 12: 2GiB In the diff it says 8 Gb. That means it has two modules/sticks?
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34564/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34564/2//COMMIT_MSG@12 PS2, Line 12: 2GiB
In the diff it says 8 Gb. […]
Yes, it has two chips, each with 8 Gbit.
Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
Patch Set 2: Code-Review+2
Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
Patch Set 2: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/34564/2/src/mainboard/up/squared/ro... File src/mainboard/up/squared/romstage.c:
https://review.coreboot.org/c/coreboot/+/34564/2/src/mainboard/up/squared/ro... PS2, Line 103: .ch0_rank_density = LP4_8Gb_DENSITY, I guess there are multiple versions of the up squared.. Maybe split this and make a variants folder? Open for discussions..
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34564/2/src/mainboard/up/squared/ro... File src/mainboard/up/squared/romstage.c:
https://review.coreboot.org/c/coreboot/+/34564/2/src/mainboard/up/squared/ro... PS2, Line 103: .ch0_rank_density = LP4_8Gb_DENSITY,
I guess there are multiple versions of the up squared.. […]
Yes there are multiple versions. As we only have one version this array has one entry for now. Each new variant will get an entry in this skus array once we can map the straps to density.
Felix Singer has uploaded a new patch set (#3) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
mb/up/squared: Fill LPDDR4 dimm info
Fill the dimm info struct to make SMBIOS type 17 appear.
TODO: Find out how to read the memory sku id and support other boards that don't have 2GiB "K4F8E304HB-MGCJ".
Change-Id: I4de63362c8fea8a886594cdcf0eec48421afb605 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/mainboard/up/squared/romstage.c 1 file changed, 23 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/34564/3
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/34564/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34564/3//COMMIT_MSG@11 PS3, Line 11: TODO: Find out how to read the memory sku id and support update commit message
https://review.coreboot.org/c/coreboot/+/34564/3/src/mainboard/up/squared/ro... File src/mainboard/up/squared/romstage.c:
https://review.coreboot.org/c/coreboot/+/34564/3/src/mainboard/up/squared/ro... PS3, Line 43: }, you need to add 3 more entries
Felix Singer has uploaded a new patch set (#4) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
mb/up/squared: Fill LPDDR4 dimm info
Fill the dimm info struct to make SMBIOS type 17 appear.
Change-Id: I4de63362c8fea8a886594cdcf0eec48421afb605 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/mainboard/up/squared/romstage.c 1 file changed, 39 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/34564/4
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/34564/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34564/3//COMMIT_MSG@11 PS3, Line 11: TODO: Find out how to read the memory sku id and support
update commit message
Done
https://review.coreboot.org/c/coreboot/+/34564/3/src/mainboard/up/squared/ro... File src/mainboard/up/squared/romstage.c:
https://review.coreboot.org/c/coreboot/+/34564/3/src/mainboard/up/squared/ro... PS3, Line 43: },
you need to add 3 more entries
Done
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
Patch Set 4:
(6 comments)
according to accumulate_channel_memory() the memory config should be as follows
https://review.coreboot.org/c/coreboot/+/34564/4/src/mainboard/up/squared/ro... File src/mainboard/up/squared/romstage.c:
https://review.coreboot.org/c/coreboot/+/34564/4/src/mainboard/up/squared/ro... PS4, Line 39: .ch1_rank_density = LP4_8Gb_DENSITY, ch1_rank_density = 0
https://review.coreboot.org/c/coreboot/+/34564/4/src/mainboard/up/squared/ro... PS4, Line 46: .ch0_rank_density = LP4_16Gb_DENSITY, LP4_8Gb_DENSITY
https://review.coreboot.org/c/coreboot/+/34564/4/src/mainboard/up/squared/ro... PS4, Line 47: .ch1_rank_density = LP4_16Gb_DENSITY, LP4_8Gb_DENSITY
https://review.coreboot.org/c/coreboot/+/34564/4/src/mainboard/up/squared/ro... PS4, Line 48: .ch0_dual_rank = 1, = 0
https://review.coreboot.org/c/coreboot/+/34564/4/src/mainboard/up/squared/ro... PS4, Line 49: .ch1_dual_rank = 1, = 0
https://review.coreboot.org/c/coreboot/+/34564/4/src/mainboard/up/squared/ro... PS4, Line 54: LP4_32Gb_DENSITY LP4_16Gb_DENSITY
Felix Singer has uploaded a new patch set (#5) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
mb/up/squared: Fill LPDDR4 dimm info
Fill the dimm info struct to make SMBIOS type 17 appear.
Change-Id: I4de63362c8fea8a886594cdcf0eec48421afb605 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/mainboard/up/squared/romstage.c 1 file changed, 39 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/34564/5
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34564/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34564/5//COMMIT_MSG@10 PS5, Line 10: tested on hardware?
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
Patch Set 5: Code-Review+2
Felix Singer has uploaded a new patch set (#6) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
mb/up/squared: Fill LPDDR4 dimm info
Fill the dimm info struct to make SMBIOS type 17 appear.
Change-Id: I4de63362c8fea8a886594cdcf0eec48421afb605 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/mainboard/up/squared/romstage.c 1 file changed, 39 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/34564/6
Felix Singer has uploaded a new patch set (#7) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
mb/up/squared: Fill LPDDR4 dimm info
Fill the dimm info struct to make SMBIOS type 17 appear.
Change-Id: I4de63362c8fea8a886594cdcf0eec48421afb605 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/mainboard/up/squared/romstage.c 1 file changed, 39 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/34564/7
Felix Singer has uploaded a new patch set (#8) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
mb/up/squared: Fill LPDDR4 dimm info
Fill the dimm info struct to make SMBIOS type 17 appear.
TESTED=Up Squared
Change-Id: I4de63362c8fea8a886594cdcf0eec48421afb605 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/mainboard/up/squared/romstage.c 1 file changed, 39 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/34564/8
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
Patch Set 8:
(7 comments)
https://review.coreboot.org/c/coreboot/+/34564/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34564/5//COMMIT_MSG@10 PS5, Line 10:
tested on hardware?
Done
https://review.coreboot.org/c/coreboot/+/34564/4/src/mainboard/up/squared/ro... File src/mainboard/up/squared/romstage.c:
https://review.coreboot.org/c/coreboot/+/34564/4/src/mainboard/up/squared/ro... PS4, Line 39: .ch1_rank_density = LP4_8Gb_DENSITY,
ch1_rank_density = 0
Done
https://review.coreboot.org/c/coreboot/+/34564/4/src/mainboard/up/squared/ro... PS4, Line 46: .ch0_rank_density = LP4_16Gb_DENSITY,
LP4_8Gb_DENSITY
Done
https://review.coreboot.org/c/coreboot/+/34564/4/src/mainboard/up/squared/ro... PS4, Line 47: .ch1_rank_density = LP4_16Gb_DENSITY,
LP4_8Gb_DENSITY
Done
https://review.coreboot.org/c/coreboot/+/34564/4/src/mainboard/up/squared/ro... PS4, Line 48: .ch0_dual_rank = 1,
= 0
Done
https://review.coreboot.org/c/coreboot/+/34564/4/src/mainboard/up/squared/ro... PS4, Line 49: .ch1_dual_rank = 1,
= 0
Done
https://review.coreboot.org/c/coreboot/+/34564/4/src/mainboard/up/squared/ro... PS4, Line 54: LP4_32Gb_DENSITY
LP4_16Gb_DENSITY
Done
Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
Patch Set 9: Code-Review+2
Philipp Deppenwiese has submitted this change. ( https://review.coreboot.org/c/coreboot/+/34564 )
Change subject: mb/up/squared: Fill LPDDR4 dimm info ......................................................................
mb/up/squared: Fill LPDDR4 dimm info
Fill the dimm info struct to make SMBIOS type 17 appear.
TESTED=Up Squared
Change-Id: I4de63362c8fea8a886594cdcf0eec48421afb605 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/34564 Reviewed-by: Philipp Deppenwiese zaolin.daisuki@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/up/squared/romstage.c 1 file changed, 39 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Philipp Deppenwiese: Looks good to me, approved
diff --git a/src/mainboard/up/squared/romstage.c b/src/mainboard/up/squared/romstage.c index 5bef64d..f9f0cfc 100644 --- a/src/mainboard/up/squared/romstage.c +++ b/src/mainboard/up/squared/romstage.c @@ -16,6 +16,7 @@ #include <string.h> #include <soc/romstage.h> #include <soc/gpio_apl.h> +#include <soc/meminit.h> #include <fsp/api.h> #include <FspmUpd.h> #include <console/console.h> @@ -29,6 +30,39 @@ */ static const uint8_t memory_skuid_pads[] = { GPIO_214, GPIO_215 };
+static const struct lpddr4_sku skus[] = { + /* Samsung 280 K4F8E304HB-MGCJ 8Gb dual-ch */ + [0] = { + .speed = LP4_SPEED_2400, + .ch0_rank_density = LP4_8Gb_DENSITY, + .ch1_rank_density = 0, + .ch0_dual_rank = 0, + .ch1_dual_rank = 0, + .part_num = "K4F8E304HB-MGCJ", + }, + [1] = { + .speed = LP4_SPEED_2400, + .ch0_rank_density = LP4_8Gb_DENSITY, + .ch1_rank_density = LP4_8Gb_DENSITY, + .ch0_dual_rank = 0, + .ch1_dual_rank = 0, + .part_num = "K4F8E304HB-MGCJ", + }, + [2] = { + .speed = LP4_SPEED_2400, + .ch0_rank_density = LP4_16Gb_DENSITY, + .ch1_rank_density = LP4_16Gb_DENSITY, + .ch0_dual_rank = 1, + .ch1_dual_rank = 1, + .part_num = "K4F6E304HB-MGCJ", + }, +}; + +static const struct lpddr4_cfg lp4cfg = { + .skus = skus, + .num_skus = ARRAY_SIZE(skus), +}; + static const uint8_t ch0_bit_swizzling[] = { 0x0D, 0x0A, 0x08, 0x0B, 0x0C, 0x0F, 0x0E, 0x09, 0x06, 0x00, 0x03, 0x04, 0x07, 0x01, 0x05, 0x02, @@ -157,3 +191,8 @@ memcpy(config->Ch3_Bit_swizzling, &ch3_bit_swizzling, sizeof(ch3_bit_swizzling)); } + +void mainboard_save_dimm_info(void) +{ + save_lpddr4_dimm_info(&lp4cfg, get_memory_skuid()); +}
-
Christian Walter (Code Review) -
Felix Singer (Code Review)
-
Patrick Rudolph (Code Review)
-
Paul Menzel (Code Review)
-
Philipp Deppenwiese (Code Review)