Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70156 )
Change subject: [WIP] Make UartSub driver bind to LPSS UART ......................................................................
[WIP] Make UartSub driver bind to LPSS UART
Crude but seems to be working for UART 2 using "fitlet2" UartSub driver.
Change-Id: I197ff2df2e4506994daa1ae72026b17ff662a9ab Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/common/block/uart/uart.c 1 file changed, 24 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/70156/1
diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c index 0ca3361..56a5d27 100644 --- a/src/soc/intel/common/block/uart/uart.c +++ b/src/soc/intel/common/block/uart/uart.c @@ -201,7 +201,7 @@ } }
-static void uart_acpi_write_irq(const struct device *dev) +static inline void uart_acpi_write_irq(const struct device *dev) { if (CONFIG(SOC_INTEL_COMMON_BLOCK_IRQ)) { const int irq = get_pci_devfn_irq(dev->path.pci.devfn); @@ -220,7 +220,7 @@ static void uart_fill_ssdt(const struct device *dev) { const char *scope = acpi_device_scope(dev); - const char *hid = acpi_device_hid(dev); + const char *hid = "INT3511"; // acpi_device_hid(dev); struct resource *res;
/* In ACPI mode the device is "invisible" */ @@ -251,8 +251,8 @@ else if (strcmp(hid, "INT34BA") == 0) acpigen_write_name_string("_CID", "INT344A");
- acpi_device_write_uid(dev); - acpigen_write_name_string("_DDN", "LPSS ACPI UART"); + //acpi_device_write_uid(dev); + //acpigen_write_name_string("_DDN", "LPSS ACPI UART");
/* Do not hide the UART device from the OS */ acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_ON); @@ -261,8 +261,14 @@ acpigen_write_name("_CRS"); acpigen_write_resourcetemplate_header();
- uart_acpi_write_irq(dev); - acpigen_write_mem32fixed(1, res->base, res->size); + struct acpi_uart uart = ACPI_UART_RAW_DEVICE(115200, 32); + uart.lines_in_use = 0xfc; + uart.shared = true; + uart.resource = scope; + + acpi_device_write_uart(&uart); + //uart_acpi_write_irq(dev); + //acpigen_write_mem32fixed(1, res->base, res->size);
acpigen_write_resourcetemplate_footer();