Change in ...coreboot[master]: soc/intel/denverton_ns: Add ACPI T-States and P-States

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/25430 )

Change subject: soc/intel/denverton_ns: Add ACPI T-States and P-States
......................................................................

soc/intel/denverton_ns: Add ACPI T-States and P-States

Also make soc_get_tss_table public and weak instead of static
in intelblock so it can be overridden in denverton.

Change-Id: Id9c7da474a81417a5cebd875023f7cd3d5a77796
Signed-off-by: Julien Viard de Galbert 
Reviewed-on: https://review.coreboot.org/c/25430
Tested-by: build bot (Jenkins) 
Reviewed-by: Vanny E 
Reviewed-by: Patrick Georgi 
Reviewed-by: David Guckian
Reviewed-by: Jay Talbott 
---
M src/soc/intel/common/block/acpi/acpi.c
M src/soc/intel/common/block/include/intelblocks/acpi.h
M src/soc/intel/denverton_ns/acpi.c
3 files changed, 31 insertions(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Patrick Georgi: Looks good to me, approved
  Vanny E: Looks good to me, but someone else must approve
  Jay Talbott: Looks good to me, but someone else must approve
  David Guckian: Looks good to me, but someone else must approve

diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c
index 5a1cc81..0027744 100644
--- a/src/soc/intel/common/block/acpi/acpi.c
+++ b/src/soc/intel/common/block/acpi/acpi.c
@@ -380,7 +380,7 @@
    acpigen_pop_len();
 }

-static acpi_tstate_t *soc_get_tss_table(int *entries)
+__attribute__ ((weak)) acpi_tstate_t *soc_get_tss_table(int *entries)
 {
    *entries = 0;
    return NULL;
diff --git a/src/soc/intel/common/block/include/intelblocks/acpi.h b/src/soc/intel/common/block/include/intelblocks/acpi.h
index 6b1b9bd..029174f 100644
--- a/src/soc/intel/common/block/include/intelblocks/acpi.h
+++ b/src/soc/intel/common/block/include/intelblocks/acpi.h
@@ -66,6 +66,12 @@
 acpi_cstate_t *soc_get_cstate_map(size_t *num_entries);

/*
+ * get_tstate_map returns a table of processor specific acpi_tstate_t entries
+ * and number of entries in the table
+ */
+acpi_tstate_t *soc_get_tss_table(int *entries);
+
+/*
  * Chipset specific quirks for the wake enable bits.
  * Returns wake events for the soc.
  */
diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c
index c7eb931..fd89c79 100644
--- a/src/soc/intel/denverton_ns/acpi.c
+++ b/src/soc/intel/denverton_ns/acpi.c
@@ -248,6 +248,30 @@
    motherboard_fill_fadt(fadt);
 }

+static acpi_tstate_t denverton_tss_table[] = {
+	{ 100, 1000, 0, 0x00, 0 },
+	{ 88, 875, 0, 0x1e, 0 },
+	{ 75, 750, 0, 0x1c, 0 },
+	{ 63, 625, 0, 0x1a, 0 },
+	{ 50, 500, 0, 0x18, 0 },
+	{ 38, 375, 0, 0x16, 0 },
+	{ 25, 250, 0, 0x14, 0 },
+	{ 13, 125, 0, 0x12, 0 },
+};
+
+acpi_tstate_t *soc_get_tss_table(int *entries)
+{
+	*entries = ARRAY_SIZE(denverton_tss_table);
+	return denverton_tss_table;
+}
+
+void soc_power_states_generation(int core_id, int cores_per_package)
+{
+	generate_p_state_entries(core_id, cores_per_package);
+
+	generate_t_state_entries(core_id, cores_per_package);
+}
+
 int soc_madt_sci_irq_polarity(int sci)
 {
    if (sci >= 20)