[S] Change in coreboot[master]: mb/amd/chausie/ec.c: Clean up defines

[Fred Reitberger (Code Review)]

Fred Reitberger has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/67408 )

Change subject: mb/amd/chausie/ec.c: Clean up defines
......................................................................

mb/amd/chausie/ec.c: Clean up defines

Use the BIT() macro instead of reinventing the wheel.

TEST=timeless builds are identical

Signed-off-by: Fred Reitberger 
Change-Id: I873013feebd30c86290dda692c7b137d5f3c4729
---
M src/mainboard/amd/chausie/ec.c
1 file changed, 25 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/67408/1

diff --git a/src/mainboard/amd/chausie/ec.c b/src/mainboard/amd/chausie/ec.c
index a2ed4ed..78465fa 100644
--- a/src/mainboard/amd/chausie/ec.c
+++ b/src/mainboard/amd/chausie/ec.c
@@ -7,27 +7,27 @@
 #define CHAUSIE_EC_DATA		0x662

#define EC_GPIO_3_ADDR		0xA3
-#define EC_GPIO_LOM_RESET_AUX	(1 << 1)
+#define EC_GPIO_LOM_RESET_AUX	BIT(1)

#define EC_GPIO_7_ADDR		0xA7
-#define EC_GPIO_DT_PWREN	(1 << 2)
-#define EC_GPIO_WWAN_MODULE_RST	(1 << 5)
+#define EC_GPIO_DT_PWREN	BIT(2)
+#define EC_GPIO_WWAN_MODULE_RST	BIT(5)

#define EC_GPIO_8_ADDR		0xA8
-#define EC_GPIO_SMBUS0_EN	(1 << 0)
+#define EC_GPIO_SMBUS0_EN	BIT(0)

#define EC_GPIO_A_ADDR		0xAA
-#define EC_GPIO_WWAN_PWREN	(1 << 3)
-#define EC_GPIO_M2_SSD0_PWREN	(1 << 6)
-#define EC_GPIO_LOM_PWREN	(1 << 7)
+#define EC_GPIO_WWAN_PWREN	BIT(3)
+#define EC_GPIO_M2_SSD0_PWREN	BIT(6)
+#define EC_GPIO_LOM_PWREN	BIT(7)

#define EC_GPIO_C_ADDR		0xAC
-#define EC_GPIO_DT_N_WLAN_SW	(1 << 1)
-#define EC_GPIO_MP2_SEL		(1 << 2)
-#define EC_GPIO_WWAN_N_LOM_SW	(1 << 3)
+#define EC_GPIO_DT_N_WLAN_SW	BIT(1)
+#define EC_GPIO_MP2_SEL		BIT(2)
+#define EC_GPIO_WWAN_N_LOM_SW	BIT(3)

#define EC_SW02_ADDR		0xB7
-#define EC_SW02_MS		(1 << 7)
+#define EC_SW02_MS		BIT(7)

static void configure_ec_gpio(void)
 {