Change in coreboot[master]: src/sb/intel/common/pirq_gen: Rework generating pin-route tables

[Arthur Heymans (Code Review)]

Hello build bot (Jenkins), Nico Huber,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/22979

to look at the new patch set (#5).

Change subject: src/sb/intel/common/pirq_gen: Rework generating pin-route tables
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src/sb/intel/common/pirq_gen: Rework generating pin-route tables

This creates a pin-route matrix first and then generates the ACPI
entries based on that. This approach has the advantage of being
simpler (no need for checks on double entries) and requiring less
access to the pci config space.

A few thing that are also fixed:
* Don't declare DEFAULT_RCBA redundantly.
* Only loop over PCI devices on bus 0
* Add a license header to rcba_pirq.c
* Remove inappropriate use of typedefs

Change-Id: Ic68a91d0cb55942a4d928b30f73e1c779142420d
Signed-off-by: Arthur Heymans 
---
M src/southbridge/intel/bd82x6x/Kconfig
M src/southbridge/intel/bd82x6x/pch.h
M src/southbridge/intel/common/acpi_pirq_gen.c
M src/southbridge/intel/common/acpi_pirq_gen.h
M src/southbridge/intel/common/rcba_pirq.c
M src/southbridge/intel/common/rcba_pirq.h
6 files changed, 83 insertions(+), 70 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/22979/5