Change in coreboot[master]: drivers/pc80/rtc: Move CMOS_POST_BANK_x definitions

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38196 )

Change subject: drivers/pc80/rtc: Move CMOS_POST_BANK_x definitions
......................................................................

drivers/pc80/rtc: Move CMOS_POST_BANK_x definitions

Change-Id: I8b56df6de7529772b0f1a59002f92c4f31486bf0
Signed-off-by: Kyösti Mälkki 
---
M src/drivers/pc80/rtc/post.c
M src/include/pc80/mc146818rtc.h
2 files changed, 27 insertions(+), 31 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/38196/1

diff --git a/src/drivers/pc80/rtc/post.c b/src/drivers/pc80/rtc/post.c
index 38ef241..8a8a762 100644
--- a/src/drivers/pc80/rtc/post.c
+++ b/src/drivers/pc80/rtc/post.c
@@ -18,6 +18,33 @@
 #include <pc80/mc146818rtc.h>
 #include <smp/spinlock.h>

+#if CONFIG(USE_OPTION_TABLE)
+# include "option_table.h"
+# define CMOS_POST_OFFSET (CMOS_VSTART_cmos_post_offset >> 3)
+#else
+# if (CONFIG_CMOS_POST_OFFSET != 0)
+#  define CMOS_POST_OFFSET CONFIG_CMOS_POST_OFFSET
+# else
+#  error "Must configure CONFIG_CMOS_POST_OFFSET"
+# endif
+
+/*
+ *    0 = Bank Select Magic
+ *    1 = Bank 0 POST
+ *    2 = Bank 1 POST
+ *  3-6 = BANK 0 Extra log
+ * 7-10 = BANK 1 Extra log
+ */
+#define CMOS_POST_BANK_OFFSET     (CMOS_POST_OFFSET)
+#define CMOS_POST_BANK_0_MAGIC    0x80
+#define CMOS_POST_BANK_0_OFFSET   (CMOS_POST_OFFSET + 1)
+#define CMOS_POST_BANK_0_EXTRA    (CMOS_POST_OFFSET + 3)
+#define CMOS_POST_BANK_1_MAGIC    0x81
+#define CMOS_POST_BANK_1_OFFSET   (CMOS_POST_OFFSET + 2)
+#define CMOS_POST_BANK_1_EXTRA    (CMOS_POST_OFFSET + 7)
+
+#define CMOS_POST_EXTRA_DEV_PATH  0x01
+
 DECLARE_SPIN_LOCK(cmos_post_lock)

int cmos_post_previous(u8 *code, u32 *extra)
diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h
index 92d8f2f..8cc2ed4 100644
--- a/src/include/pc80/mc146818rtc.h
+++ b/src/include/pc80/mc146818rtc.h
@@ -181,37 +181,6 @@
 int cmos_checksum_valid(int range_start, int range_end, int cks_loc);
 void cmos_set_checksum(int range_start, int range_end, int cks_loc);

-#if CONFIG(CMOS_POST)
-#if CONFIG(USE_OPTION_TABLE)
-# include "option_table.h"
-# define CMOS_POST_OFFSET (CMOS_VSTART_cmos_post_offset >> 3)
-#else
-# if (CONFIG_CMOS_POST_OFFSET != 0)
-#  define CMOS_POST_OFFSET CONFIG_CMOS_POST_OFFSET
-# else
-#  error "Must configure CONFIG_CMOS_POST_OFFSET"
-# endif
-#endif
-
-/*
- *    0 = Bank Select Magic
- *    1 = Bank 0 POST
- *    2 = Bank 1 POST
- *  3-6 = BANK 0 Extra log
- * 7-10 = BANK 1 Extra log
- */
-#define CMOS_POST_BANK_OFFSET     (CMOS_POST_OFFSET)
-#define CMOS_POST_BANK_0_MAGIC    0x80
-#define CMOS_POST_BANK_0_OFFSET   (CMOS_POST_OFFSET + 1)
-#define CMOS_POST_BANK_0_EXTRA    (CMOS_POST_OFFSET + 3)
-#define CMOS_POST_BANK_1_MAGIC    0x81
-#define CMOS_POST_BANK_1_OFFSET   (CMOS_POST_OFFSET + 2)
-#define CMOS_POST_BANK_1_EXTRA    (CMOS_POST_OFFSET + 7)
-
-#define CMOS_POST_EXTRA_DEV_PATH  0x01
-
-#endif /* CONFIG_CMOS_POST */
-
 #endif /* CONFIG_ARCH_X86 */

void cmos_post_init(void);

[Kyösti Mälkki (Code Review)]

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/38196

to look at the new patch set (#2).

Change subject: drivers/pc80/rtc: Move CMOS_POST_BANK_x definitions
......................................................................

drivers/pc80/rtc: Move CMOS_POST_BANK_x definitions

Change-Id: I8b56df6de7529772b0f1a59002f92c4f31486bf0
Signed-off-by: Kyösti Mälkki 
---
M src/drivers/pc80/rtc/post.c
M src/include/pc80/mc146818rtc.h
2 files changed, 28 insertions(+), 31 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/38196/2

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38196 )

Change subject: drivers/pc80/rtc: Move CMOS_POST_BANK_x definitions
......................................................................

Patch Set 4: Code-Review+2

[Aaron Durbin (Code Review)]

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38196 )

Change subject: drivers/pc80/rtc: Move CMOS_POST_BANK_x definitions
......................................................................

Patch Set 5: Code-Review+2

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38196 )

Change subject: drivers/pc80/rtc: Move CMOS_POST_BANK_x definitions
......................................................................

Patch Set 5: Code-Review+2

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38196 )

Change subject: drivers/pc80/rtc: Move CMOS_POST_BANK_x definitions
......................................................................

drivers/pc80/rtc: Move CMOS_POST_BANK_x definitions

Change-Id: I8b56df6de7529772b0f1a59002f92c4f31486bf0
Signed-off-by: Kyösti Mälkki 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38196
Reviewed-by: Aaron Durbin 
Reviewed-by: Furquan Shaikh 
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
M src/drivers/pc80/rtc/post.c
M src/include/pc80/mc146818rtc.h
2 files changed, 28 insertions(+), 31 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Aaron Durbin: Looks good to me, approved
  Furquan Shaikh: Looks good to me, approved
  Angel Pons: Looks good to me, approved

diff --git a/src/drivers/pc80/rtc/post.c b/src/drivers/pc80/rtc/post.c
index 41a664e..f993b96 100644
--- a/src/drivers/pc80/rtc/post.c
+++ b/src/drivers/pc80/rtc/post.c
@@ -7,6 +7,34 @@
 #include <pc80/mc146818rtc.h>
 #include <smp/spinlock.h>

+#if CONFIG(USE_OPTION_TABLE)
+# include "option_table.h"
+# define CMOS_POST_OFFSET (CMOS_VSTART_cmos_post_offset >> 3)
+#else
+# if (CONFIG_CMOS_POST_OFFSET != 0)
+#  define CMOS_POST_OFFSET CONFIG_CMOS_POST_OFFSET
+# else
+#  error "Must configure CONFIG_CMOS_POST_OFFSET"
+# endif
+#endif
+
+/*
+ *    0 = Bank Select Magic
+ *    1 = Bank 0 POST
+ *    2 = Bank 1 POST
+ *  3-6 = BANK 0 Extra log
+ * 7-10 = BANK 1 Extra log
+ */
+#define CMOS_POST_BANK_OFFSET     (CMOS_POST_OFFSET)
+#define CMOS_POST_BANK_0_MAGIC    0x80
+#define CMOS_POST_BANK_0_OFFSET   (CMOS_POST_OFFSET + 1)
+#define CMOS_POST_BANK_0_EXTRA    (CMOS_POST_OFFSET + 3)
+#define CMOS_POST_BANK_1_MAGIC    0x81
+#define CMOS_POST_BANK_1_OFFSET   (CMOS_POST_OFFSET + 2)
+#define CMOS_POST_BANK_1_EXTRA    (CMOS_POST_OFFSET + 7)
+
+#define CMOS_POST_EXTRA_DEV_PATH  0x01
+
 DECLARE_SPIN_LOCK(cmos_post_lock)

int cmos_post_previous_boot(u8 *code, u32 *extra)
diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h
index edaeb1e..353a09b 100644
--- a/src/include/pc80/mc146818rtc.h
+++ b/src/include/pc80/mc146818rtc.h
@@ -181,37 +181,6 @@
 int cmos_checksum_valid(int range_start, int range_end, int cks_loc);
 void cmos_set_checksum(int range_start, int range_end, int cks_loc);

-#if CONFIG(CMOS_POST)
-#if CONFIG(USE_OPTION_TABLE)
-# include "option_table.h"
-# define CMOS_POST_OFFSET (CMOS_VSTART_cmos_post_offset >> 3)
-#else
-# if (CONFIG_CMOS_POST_OFFSET != 0)
-#  define CMOS_POST_OFFSET CONFIG_CMOS_POST_OFFSET
-# else
-#  error "Must configure CONFIG_CMOS_POST_OFFSET"
-# endif
-#endif
-
-/*
- *    0 = Bank Select Magic
- *    1 = Bank 0 POST
- *    2 = Bank 1 POST
- *  3-6 = BANK 0 Extra log
- * 7-10 = BANK 1 Extra log
- */
-#define CMOS_POST_BANK_OFFSET     (CMOS_POST_OFFSET)
-#define CMOS_POST_BANK_0_MAGIC    0x80
-#define CMOS_POST_BANK_0_OFFSET   (CMOS_POST_OFFSET + 1)
-#define CMOS_POST_BANK_0_EXTRA    (CMOS_POST_OFFSET + 3)
-#define CMOS_POST_BANK_1_MAGIC    0x81
-#define CMOS_POST_BANK_1_OFFSET   (CMOS_POST_OFFSET + 2)
-#define CMOS_POST_BANK_1_EXTRA    (CMOS_POST_OFFSET + 7)
-
-#define CMOS_POST_EXTRA_DEV_PATH  0x01
-
-#endif /* CONFIG_CMOS_POST */
-
 #endif /* CONFIG_ARCH_X86 */

void cmos_post_init(void);