Xi Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49634 )
Change subject: mb/google/asurada: Add byte mode sdparam config ......................................................................
mb/google/asurada: Add byte mode sdparam config
Some 8GB DDRs may use byte mode instead of normal mode, prepare the byte mode config template for these DDRs.
Signed-off-by: Xi Chen xixi.chen@mediatek.com Change-Id: I216f6ff46b1520076379ea85fcb4cc2e1efebaf0 --- M src/mainboard/google/asurada/sdram_configs.c M src/mainboard/google/asurada/sdram_params/Makefile.inc M src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-1RANK-4GB.c M src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-4GB.c A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE.c M src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-8GB.c M src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-1RANK-4GB.c M src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-2RANK-4GB.c M src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-2RANK-8GB.c M src/soc/mediatek/mt8192/include/soc/dramc_param.h 10 files changed, 23 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/49634/1
diff --git a/src/mainboard/google/asurada/sdram_configs.c b/src/mainboard/google/asurada/sdram_configs.c index 4056ba5..0a8529f 100644 --- a/src/mainboard/google/asurada/sdram_configs.c +++ b/src/mainboard/google/asurada/sdram_configs.c @@ -9,11 +9,11 @@ static const char *const sdram_configs[] = { /* Exceptional legacy module */ [0x00] = "sdram-lpddr4x-MT29VZZZBD9DQKPR-046-6GB", + [0x01] = "sdram-lpddr4x-MT29VZZZAD8GQFSL-046-4GB", + [0x02] = "sdram-lpddr4x-KMDP6001DA-B425-4GB", + [0x03] = "sdram-lpddr4x-KMDV6001DA-B620-4GB",
/* Group 0x0: eMCP 4GB single rank. */ - [0x01] = "sdram-lpddr4x-MT29VZZZAD8GQFSL-046-4GB", - [0x02] = "sdram-lpddr4x-EMCP-1RANK-4GB", - [0x03] = "sdram-lpddr4x-EMCP-1RANK-4GB", [0x04] = "sdram-lpddr4x-EMCP-1RANK-4GB", [0x05] = "sdram-lpddr4x-EMCP-1RANK-4GB", [0x06] = "sdram-lpddr4x-EMCP-1RANK-4GB", @@ -95,8 +95,8 @@
/* Group 0x6: discrete 8GB dual rank. */ [0x60] = "sdram-lpddr4x-DISCRETE-2RANK-8GB", - [0x61] = "sdram-lpddr4x-DISCRETE-2RANK-8GB", - [0x62] = "sdram-lpddr4x-DISCRETE-2RANK-8GB", + [0x61] = "sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE", + [0x62] = "sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE", [0x63] = "sdram-lpddr4x-DISCRETE-2RANK-8GB", [0x64] = "sdram-lpddr4x-DISCRETE-2RANK-8GB", [0x65] = "sdram-lpddr4x-DISCRETE-2RANK-8GB", diff --git a/src/mainboard/google/asurada/sdram_params/Makefile.inc b/src/mainboard/google/asurada/sdram_params/Makefile.inc index d6e1214..20df2ba 100644 --- a/src/mainboard/google/asurada/sdram_params/Makefile.inc +++ b/src/mainboard/google/asurada/sdram_params/Makefile.inc @@ -7,6 +7,7 @@ sdram-params += sdram-lpddr4x-DISCRETE-1RANK-4GB sdram-params += sdram-lpddr4x-DISCRETE-2RANK-4GB sdram-params += sdram-lpddr4x-DISCRETE-2RANK-8GB +sdram-params += sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE
sdram-params += sdram-lpddr4x-MT29VZZZBD9DQKPR-046-6GB sdram-params += sdram-lpddr4x-MT29VZZZAD8GQFSL-046-4GB diff --git a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-1RANK-4GB.c b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-1RANK-4GB.c index 8ae9b69..aef8512 100644 --- a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-1RANK-4GB.c +++ b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-1RANK-4GB.c @@ -4,4 +4,5 @@
struct sdram_info params = { .ddr_geometry = DDR_TYPE_2CH_1RK_4GB_4_0, + .ddr_type = DDR_TYPE_DISCRETE, }; diff --git a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-4GB.c b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-4GB.c index aa9c084..5735df5 100644 --- a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-4GB.c +++ b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-4GB.c @@ -4,4 +4,5 @@
struct sdram_info params = { .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, + .ddr_type = DDR_TYPE_DISCRETE, }; diff --git a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE.c b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE.c new file mode 100644 index 0000000..51e8a6f --- /dev/null +++ b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE.c @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/dramc_param.h> + +struct sdram_info params = { + .ddr_geometry = DDR_TYPE_2CH_2RK_8GB_4_4_BYTE, + .ddr_type = DDR_TYPE_DISCRETE, +}; diff --git a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-8GB.c b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-8GB.c index 33ec49a..3d12588 100644 --- a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-8GB.c +++ b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-8GB.c @@ -4,4 +4,5 @@
struct sdram_info params = { .ddr_geometry = DDR_TYPE_2CH_2RK_8GB_4_4, + .ddr_type = DDR_TYPE_DISCRETE, }; diff --git a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-1RANK-4GB.c b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-1RANK-4GB.c index 8ae9b69..15217f0 100644 --- a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-1RANK-4GB.c +++ b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-1RANK-4GB.c @@ -4,4 +4,5 @@
struct sdram_info params = { .ddr_geometry = DDR_TYPE_2CH_1RK_4GB_4_0, + .ddr_type = DDR_TYPE_EMCP, }; diff --git a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-2RANK-4GB.c b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-2RANK-4GB.c index aa9c084..bed9418 100644 --- a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-2RANK-4GB.c +++ b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-2RANK-4GB.c @@ -4,4 +4,5 @@
struct sdram_info params = { .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, + .ddr_type = DDR_TYPE_EMCP, }; diff --git a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-2RANK-8GB.c b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-2RANK-8GB.c index 33ec49a..17c954c 100644 --- a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-2RANK-8GB.c +++ b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-2RANK-8GB.c @@ -4,4 +4,5 @@
struct sdram_info params = { .ddr_geometry = DDR_TYPE_2CH_2RK_8GB_4_4, + .ddr_type = DDR_TYPE_EMCP, }; diff --git a/src/soc/mediatek/mt8192/include/soc/dramc_param.h b/src/soc/mediatek/mt8192/include/soc/dramc_param.h index 30ac4d4..74fe929 100644 --- a/src/soc/mediatek/mt8192/include/soc/dramc_param.h +++ b/src/soc/mediatek/mt8192/include/soc/dramc_param.h @@ -40,12 +40,14 @@ DDR_TYPE_EMCP, };
+/* Never change the sequence, which is matched with blob */ enum DRAMC_PARAM_GEOMETRY_TYPE { DDR_TYPE_2CH_2RK_4GB_2_2, DDR_TYPE_2CH_2RK_6GB_3_3, - DDR_TYPE_2CH_2RK_8GB_4_4, + DDR_TYPE_2CH_2RK_8GB_4_4_BYTE, DDR_TYPE_2CH_1RK_4GB_4_0, DDR_TYPE_2CH_2RK_6GB_2_4, + DDR_TYPE_2CH_2RK_8GB_4_4, };
enum DRAM_PARAM_VOLTAGE_TYPE {
-
Xi Chen (Code Review)