Attention is currently required from: Arthur Heymans, Felix Held.
Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76517?usp=email )
Change subject: soc/amd/genoa: Add USB configuration
......................................................................
Patch Set 5:
(1 comment)
File src/vendorcode/amd/opensil/ramstage.c:
https://review.coreboot.org/c/coreboot/+/76517/comment/e7657893_4871e791 :
PS2, Line 65: struct device *dev = pcidev_on_root(0x18, 0);
: assert(dev);
: const config_t *soc_config = (config_t *)dev->chip_info;
: assert(soc_config);
config_of_soc() can be used with CB:77168
This patch was split into two parts. This one is now about Genoa, so this comment now goes with CB:78919 and has been resolved there.
--
To view, visit
https://review.coreboot.org/c/coreboot/+/76517?usp=email
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I506547a7abbb643d3e982e44a92f33b45cd739e9
Gerrit-Change-Number: 76517
Gerrit-PatchSet: 5
Gerrit-Owner: Arthur Heymans
arthur@aheymans.xyz
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Felix Held
felix-coreboot@felixheld.de
Gerrit-CC: Martin L Roth
gaumless@gmail.com
Gerrit-CC: Stefan Reinauer
stefan.reinauer@coreboot.org
Gerrit-Attention: Arthur Heymans
arthur@aheymans.xyz
Gerrit-Attention: Felix Held
felix-coreboot@felixheld.de
Gerrit-Comment-Date: Tue, 28 Nov 2023 18:28:48 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Felix Held
felix-coreboot@felixheld.de
Gerrit-MessageType: comment