Change in coreboot[master]: soc/intel/common: Add functions into common system agent library

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/21267

Change subject: soc/intel/common: Add functions into common system agent library
......................................................................

soc/intel/common: Add functions into common system agent library

This patch to add helper function to get tseg memory base and
size for HW based memory layout design.

BRANCH=none
BUG=b:63974384
TEST=Build and boot eve successfully.

Change-Id: I4c8b79f047e3dc6b2deb17fdb745f004004526b6
Signed-off-by: Subrata Banik 
---
M src/soc/intel/common/block/include/intelblocks/systemagent.h
M src/soc/intel/common/block/systemagent/systemagent_early.c
2 files changed, 23 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/21267/1

diff --git a/src/soc/intel/common/block/include/intelblocks/systemagent.h b/src/soc/intel/common/block/include/intelblocks/systemagent.h
index 5f04e36..4ca19e6 100644
--- a/src/soc/intel/common/block/include/intelblocks/systemagent.h
+++ b/src/soc/intel/common/block/include/intelblocks/systemagent.h
@@ -74,11 +74,15 @@
 /* API to enable Power Aware Interrupt Routing through MCHBAR */
 void enable_power_aware_intr(void);
 /* API to get TOLUD base address */
-uint32_t sa_get_tolud_base(void);
+uintptr_t sa_get_tolud_base(void);
 /* API to get DSM size */
 size_t sa_get_dsm_size(void);
 /* API to get GSM size */
 size_t sa_get_gsm_size(void);
+/* API to get TSEG base address */
+uintptr_t sa_get_tseg_base(void);
+/* API to get TSEG size */
+size_t sa_get_tseg_size(void);
 /* API to get DPR size */
 size_t sa_get_dpr_size(void);
 /*
diff --git a/src/soc/intel/common/block/systemagent/systemagent_early.c b/src/soc/intel/common/block/systemagent/systemagent_early.c
index 855d953..4abc15f 100644
--- a/src/soc/intel/common/block/systemagent/systemagent_early.c
+++ b/src/soc/intel/common/block/systemagent/systemagent_early.c
@@ -133,7 +133,7 @@
    MCHBAR8(BIOS_RESET_CPL) = bios_reset_cpl;
 }

-uint32_t sa_get_tolud_base(void)
+uintptr_t sa_get_tolud_base(void)
 {
    /* All regions concerned for have 1 MiB alignment. */
    return ALIGN_DOWN(pci_read_config32(SA_DEV_ROOT, TOLUD), 1*MiB);
@@ -147,6 +147,12 @@
 size_t sa_get_dsm_size(void)
 {
    return (((sa_get_ggc_reg() & G_GMS_MASK) >> G_GMS_OFFSET) * 32*MiB);
+}
+
+static uintptr_t sa_get_gsm_base(void)
+{
+	/* All regions concerned for have 1 MiB alignment. */
+	return ALIGN_DOWN(pci_read_config32(SA_DEV_ROOT, BGSM), 1*MiB);
 }

size_t sa_get_gsm_size(void)
@@ -165,6 +171,17 @@
    	return 0;
 }

+uintptr_t sa_get_tseg_base(void)
+{
+	/* All regions concerned for have 1 MiB alignment. */
+	return ALIGN_DOWN(pci_read_config32(SA_DEV_ROOT, TSEG), 1*MiB);
+}
+
+size_t sa_get_tseg_size(void)
+{
+	return sa_get_gsm_base() - sa_get_tseg_base();
+}
+
 /*
  * Get DPR size in case CONFIG_SA_ENABLE_DPR is selected by SoC.
  */