Change in coreboot[master]: soc/intel/common/block/usb4: Add TCSS XHCI driver for SSDT generation
Duncan Laurie has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46851 )
Change subject: soc/intel/common/block/usb4: Add TCSS XHCI driver for SSDT generation ......................................................................
soc/intel/common/block/usb4: Add TCSS XHCI driver for SSDT generation
In order to generate ACPI entries for USB devices attached to the USB4/TBT/TCSS/North XHCI device it needs to have a driver that will enumerate static devices on the bus. This driver does that and nothing else.
BUG=b:151731851 TEST=boot on volteer and check for USB devices on _SB.PCI0.TXHC.RHUB
Signed-off-by: Duncan Laurie dlaurie@google.com Change-Id: I5a2ff1cd1bed557e793d45119232cf87032ddd7b --- M src/soc/intel/common/block/usb4/Kconfig M src/soc/intel/common/block/usb4/Makefile.inc A src/soc/intel/common/block/usb4/xhci.c 3 files changed, 45 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/46851/1
diff --git a/src/soc/intel/common/block/usb4/Kconfig b/src/soc/intel/common/block/usb4/Kconfig index be0b378..8d18180 100644 --- a/src/soc/intel/common/block/usb4/Kconfig +++ b/src/soc/intel/common/block/usb4/Kconfig @@ -11,3 +11,10 @@ help Chip driver for adding PCI ops and SSDT generation for common Intel USB4/Thunderbolt root ports. + +config SOC_INTEL_COMMON_BLOCK_USB4_XHCI + bool + default n + help + Chip driver for adding PCI ops and SSDT generation for common Intel + USB4/Thunderbolt North XHCI ports. diff --git a/src/soc/intel/common/block/usb4/Makefile.inc b/src/soc/intel/common/block/usb4/Makefile.inc index 89ce426..91f0991 100644 --- a/src/soc/intel/common/block/usb4/Makefile.inc +++ b/src/soc/intel/common/block/usb4/Makefile.inc @@ -1,2 +1,3 @@ ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4) += usb4.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_PCIE) += pcie.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_XHCI) += xhci.c diff --git a/src/soc/intel/common/block/usb4/xhci.c b/src/soc/intel/common/block/usb4/xhci.c new file mode 100644 index 0000000..4fe60dd --- /dev/null +++ b/src/soc/intel/common/block/usb4/xhci.c @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <intelblocks/acpi.h> +#include <soc/pci_devs.h> + +static const char *usb4_xhci_acpi_name(const struct device *dev) +{ + if (dev->path.type != DEVICE_PATH_PCI) + return NULL; + + return "TXHC"; +} + +static struct device_operations usb4_xhci_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .ops_pci = &pci_dev_ops_pci, + .scan_bus = scan_static_bus, +#if CONFIG(HAVE_ACPI_TABLES) + .acpi_name = usb4_xhci_acpi_name, +#endif +}; + +static const unsigned short pci_device_ids[] = { + PCI_DEVICE_ID_INTEL_TGP_TCSS_XHCI, + 0 +}; + +static const struct pci_driver usb4_xhci __pci_driver = { + .ops = &usb4_xhci_ops, + .vendor = PCI_VENDOR_ID_INTEL, + .devices = pci_device_ids, +};
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46851 )
Change subject: soc/intel/common/block/usb4: Add TCSS XHCI driver for SSDT generation ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/46851/1/src/soc/intel/common/block/... File src/soc/intel/common/block/usb4/Kconfig:
https://review.coreboot.org/c/coreboot/+/46851/1/src/soc/intel/common/block/... PS1, Line 19: Chip PCI?
Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46851
to look at the new patch set (#2).
Change subject: soc/intel/common/block/usb4: Add TCSS XHCI driver for SSDT generation ......................................................................
soc/intel/common/block/usb4: Add TCSS XHCI driver for SSDT generation
In order to generate ACPI entries for USB devices attached to the USB4/TBT/TCSS/North XHCI device it needs to have a driver that will enumerate static devices on the bus. This driver does that and nothing else.
BUG=b:151731851 TEST=boot on volteer and check for USB devices on _SB.PCI0.TXHC.RHUB
Signed-off-by: Duncan Laurie dlaurie@google.com Change-Id: I5a2ff1cd1bed557e793d45119232cf87032ddd7b --- M src/soc/intel/common/block/usb4/Kconfig M src/soc/intel/common/block/usb4/Makefile.inc A src/soc/intel/common/block/usb4/xhci.c 3 files changed, 45 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/46851/2
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46851 )
Change subject: soc/intel/common/block/usb4: Add TCSS XHCI driver for SSDT generation ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46851/1/src/soc/intel/common/block/... File src/soc/intel/common/block/usb4/Kconfig:
https://review.coreboot.org/c/coreboot/+/46851/1/src/soc/intel/common/block/... PS1, Line 19: Chip
PCI?
Done
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46851 )
Change subject: soc/intel/common/block/usb4: Add TCSS XHCI driver for SSDT generation ......................................................................
Patch Set 2: Code-Review+2
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46851 )
Change subject: soc/intel/common/block/usb4: Add TCSS XHCI driver for SSDT generation ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46851/2/src/soc/intel/common/block/... File src/soc/intel/common/block/usb4/xhci.c:
https://review.coreboot.org/c/coreboot/+/46851/2/src/soc/intel/common/block/... PS2, Line 30: 0 We'll also need PCI_DEVICE_ID_INTEL_ADP_P_XHCI & PCI_DEVICE_ID_INTEL_ADP_S_XHCI eventually. In a later patch, we may have to go through a few more intel/common ones and add in the ADP IDs.
Duncan Laurie has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46851 )
Change subject: soc/intel/common/block/usb4: Add TCSS XHCI driver for SSDT generation ......................................................................
soc/intel/common/block/usb4: Add TCSS XHCI driver for SSDT generation
In order to generate ACPI entries for USB devices attached to the USB4/TBT/TCSS/North XHCI device it needs to have a driver that will enumerate static devices on the bus. This driver does that and nothing else.
BUG=b:151731851 TEST=boot on volteer and check for USB devices on _SB.PCI0.TXHC.RHUB
Signed-off-by: Duncan Laurie dlaurie@google.com Change-Id: I5a2ff1cd1bed557e793d45119232cf87032ddd7b Reviewed-on: https://review.coreboot.org/c/coreboot/+/46851 Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/common/block/usb4/Kconfig M src/soc/intel/common/block/usb4/Makefile.inc A src/soc/intel/common/block/usb4/xhci.c 3 files changed, 45 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/soc/intel/common/block/usb4/Kconfig b/src/soc/intel/common/block/usb4/Kconfig index be0b378..fb876e1 100644 --- a/src/soc/intel/common/block/usb4/Kconfig +++ b/src/soc/intel/common/block/usb4/Kconfig @@ -11,3 +11,10 @@ help Chip driver for adding PCI ops and SSDT generation for common Intel USB4/Thunderbolt root ports. + +config SOC_INTEL_COMMON_BLOCK_USB4_XHCI + bool + default n + help + Minimal PCI driver for adding PCI ops and SSDT generation for common + Intel USB4/Thunderbolt North XHCI ports. diff --git a/src/soc/intel/common/block/usb4/Makefile.inc b/src/soc/intel/common/block/usb4/Makefile.inc index 89ce426..91f0991 100644 --- a/src/soc/intel/common/block/usb4/Makefile.inc +++ b/src/soc/intel/common/block/usb4/Makefile.inc @@ -1,2 +1,3 @@ ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4) += usb4.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_PCIE) += pcie.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_XHCI) += xhci.c diff --git a/src/soc/intel/common/block/usb4/xhci.c b/src/soc/intel/common/block/usb4/xhci.c new file mode 100644 index 0000000..4fe60dd --- /dev/null +++ b/src/soc/intel/common/block/usb4/xhci.c @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <intelblocks/acpi.h> +#include <soc/pci_devs.h> + +static const char *usb4_xhci_acpi_name(const struct device *dev) +{ + if (dev->path.type != DEVICE_PATH_PCI) + return NULL; + + return "TXHC"; +} + +static struct device_operations usb4_xhci_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .ops_pci = &pci_dev_ops_pci, + .scan_bus = scan_static_bus, +#if CONFIG(HAVE_ACPI_TABLES) + .acpi_name = usb4_xhci_acpi_name, +#endif +}; + +static const unsigned short pci_device_ids[] = { + PCI_DEVICE_ID_INTEL_TGP_TCSS_XHCI, + 0 +}; + +static const struct pci_driver usb4_xhci __pci_driver = { + .ops = &usb4_xhci_ops, + .vendor = PCI_VENDOR_ID_INTEL, + .devices = pci_device_ids, +};
-
Duncan Laurie (Code Review) -
Furquan Shaikh (Code Review)
-
Tim Wawrzynczak (Code Review)