Maximilian Brune has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81909?usp=email )
Change subject: soc/sifive/fu540/chip.c: Add RAM resources ......................................................................
soc/sifive/fu540/chip.c: Add RAM resources
Add RAM region so that the payload can be placed in there without coreboot complaining that the payload doesn't target a RAM region.
Signed-off-by: Maximilian Brune maximilian.brune@9elements.com Change-Id: Id07eae3560ce69cd8a6a695702fa0b4463c50855 Reviewed-on: https://review.coreboot.org/c/coreboot/+/81909 Reviewed-by: Arthur Heymans arthur@aheymans.xyz Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/sifive/hifive-unleashed/devicetree.cb M src/soc/sifive/fu540/chip.c 2 files changed, 13 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve
diff --git a/src/mainboard/sifive/hifive-unleashed/devicetree.cb b/src/mainboard/sifive/hifive-unleashed/devicetree.cb index 796c232..02d8dee 100644 --- a/src/mainboard/sifive/hifive-unleashed/devicetree.cb +++ b/src/mainboard/sifive/hifive-unleashed/devicetree.cb @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only
chip soc/sifive/fu540 - device cpu_cluster 0 on end + device cpu_cluster 0 on ops fu540_cpu_ops end end diff --git a/src/soc/sifive/fu540/chip.c b/src/soc/sifive/fu540/chip.c index e33b4a3..1733b20 100644 --- a/src/soc/sifive/fu540/chip.c +++ b/src/soc/sifive/fu540/chip.c @@ -1,6 +1,18 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <cbmem.h> #include <device/device.h> +#include <soc/addressmap.h> + +static void fu540_read_resources(struct device *dev) +{ + int index = 0; + ram_from_to(dev, index++, FU540_DRAM, (uintptr_t)cbmem_top()); +} + +struct device_operations fu540_cpu_ops = { + .read_resources = fu540_read_resources, +};
struct chip_operations soc_sifive_fu540_ops = { .name = "SIFIVE FU540",