[XS] Change in coreboot[main]: mb/system76/adl,rpl: Add FSP default timeout for PCIe 3.0 RPs

[Tim Crawford (Code Review)]

Attention is currently required from: Jeremy Soller, Paul Menzel.

Tim Crawford has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80756?usp=email )

Change subject: mb/system76/adl,rpl: Add FSP default timeout for PCIe 3.0 RPs
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Patch Set 3:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/80756/comment/c92ebe75_3060cf93 :
PS1, Line 15:
> Changed to use FSP default of 56ms.

I actually misread the FSP UPD. It doesn't set this, so the value is arbitrary. 50ms is a lot, but I'm not going to figure out how low I can make it.