[M] Change in coreboot[main]: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING

[Gareth Yu (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eric Lai, Gareth Yu, Jayvik Desai, Kapil Porwal, Lawrence Chang, Nick Vaccaro, Paul Menzel, SH Kim, Simon Yang, Subrata Banik.

Gareth Yu has posted comments on this change by Lawrence Chang. ( https://review.coreboot.org/c/coreboot/+/86838?usp=email )

Change subject: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING
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Patch Set 25:

(3 comments)

File src/mainboard/google/brya/variants/meliks/ramstage.c:

https://review.coreboot.org/c/coreboot/+/86838/comment/fa7a8551_e29c3285?usp... :
PS25, Line 10: REG_COMMAND						0x04
> you can find these macros inside `device/pci.h`. […]

Will do it.

https://review.coreboot.org/c/coreboot/+/86838/comment/47277572_b3671a99?usp... :
PS25, Line 12: 
             : #define REG_COMMAND_BM					(1 << 2)
             :
> not needed

Will do it.

https://review.coreboot.org/c/coreboot/+/86838/comment/00162adf_77929a74?usp... :
PS25, Line 38: TEMP_IGD_ADDRESS
> CONFIG_GFX_GMA_DEFAULT_MMIO ? […]

Will do it.