Change in coreboot[master]: mainboard/intel/cannonlake_rvp: Enable S0ix

[Vaibhav Shankar (Code Review)]

Vaibhav Shankar has uploaded this change for review. ( https://review.coreboot.org/25293

Change subject: mainboard/intel/cannonlake_rvp: Enable S0ix
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mainboard/intel/cannonlake_rvp: Enable S0ix

This patch enables S0ix from the devicetree.

Change-Id: I38662dc7203366bdee5f1c7aaa18979867a79ba1
Signed-off-by: Vaibhav Shankar 
---
M src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb
M src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb
2 files changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/25293/1

diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb
index 3e60ed9..18aa65d 100644
--- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb
+++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb
@@ -70,6 +70,9 @@
    # GPIO for SD card detect
    register "sdcard_cd_gpio" = "GPP_G5"

+	# Enable S0ix
+	register "s0ix_enable" = "1"
+
    # Audio
    register "i2c[3]" = "{
    	.speed = I2C_SPEED_STANDARD,
diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb
index 8502048..6dd1893 100644
--- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb
+++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb
@@ -68,6 +68,9 @@
    # GPIO for SD card detect
    register "sdcard_cd_gpio" = "GPP_G5"

+	# Enable S0ix
+	register "s0ix_enable" = "1"
+
    device domain 0 on
    	device pci 00.0 on  end # Host Bridge
    	device pci 02.0 on  end # Integrated Graphics Device