Attention is currently required from: Tim Wawrzynczak, Subrata Banik, Angel Pons, Aamir Bohra. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50913 )
Change subject: intel/common/block/cpu: Add APIs to get CPU info from lapic ID ......................................................................
Patch Set 2:
(3 comments)
File src/soc/intel/common/block/cpu/cpulib.c:
https://review.coreboot.org/c/coreboot/+/50913/comment/b375fc57_4e6e2608 PS2, Line 410: * nit: space before *
https://review.coreboot.org/c/coreboot/+/50913/comment/70fb03a0_5aebe8de PS2, Line 411: cpuid_regs.eax `cpuid_get_max_func()`
https://review.coreboot.org/c/coreboot/+/50913/comment/85156406_8a10ab8b PS2, Line 422: level_num Shouldn't the same check for level type be applied for SMT as well?
``` for (level = 0; ; level++) { cpuid_regs = cpuid_ext(cpu_id_op, level); if (CPUID_LEVEL_TYPE(level) == INVALID) break;
switch (CPUID_LEVEL_TYPE(level)) { case SMT: thread_bits = cpuid_regs.eax & CPUID_CPU_TOPOLOGY_LEVEL_BITS_MASK; break; case CORE: core_bits = cpuid_regs.eax & CPUID_CPU_TOPOLOGY_LEVEL_BITS_MASK; break; default: break; } }
thread_shift = 0; thread_mask = BIT(thread_bits) - 1;
core_shift = thread_bits; core_mask = BIT(core_bits - thread_bits) - 1;
package_shift = core_bits; ```