Change in coreboot[master]: soc/mediatek/mt8186: Add register protect control for MT6366

[Rex-BC Chen (Code Review)]

Rex-BC Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61390 )

Change subject: soc/mediatek/mt8186: Add register protect control for MT6366
......................................................................

soc/mediatek/mt8186: Add register protect control for MT6366

Some registers of PMIC init settings are protected, so we failed to
set correct value for init_setting. We disable protection before
setting PMIC init setting and enable it after the init setting is
done.

BUG=b:216263707
TEST=PMIC setting value is setting correctly.

Signed-off-by: Rex-BC Chen 
Change-Id: I94d73d9c8a137444988e65c3709d29a3a4c03c5b
---
M src/soc/mediatek/mt8186/mt6366.c
1 file changed, 11 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/61390/1

diff --git a/src/soc/mediatek/mt8186/mt6366.c b/src/soc/mediatek/mt8186/mt6366.c
index 9ca7c05..56a92ae 100644
--- a/src/soc/mediatek/mt8186/mt6366.c
+++ b/src/soc/mediatek/mt8186/mt6366.c
@@ -777,12 +777,23 @@
    pwrap_write_field(PMIC_TOP_RST_MISC_SET, 0x0001, 0xFFFF, 0);
 }

+static void mt6366_protect_control(bool en_protect)
+{
+	struct pmic_setting tma_setting = {0x3A8, 0x0, 0xFFFF, 0};
+	tma_setting.val = en_protect ? 0 : 0x9CA7;
+
+	pwrap_write_field(tma_setting.addr, tma_setting.val,
+			  tma_setting.mask, tma_setting.shift);
+}
+
 static void mt6366_init_setting(void)
 {
+	mt6366_protect_control(false);
    for (size_t i = 0; i < ARRAY_SIZE(init_setting); i++)
    	pwrap_write_field(
    		init_setting[i].addr, init_setting[i].val,
    		init_setting[i].mask, init_setting[i].shift);
+	mt6366_protect_control(true);
 }

static void wk_sleep_voltage_by_ddr(void)