Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78502?usp=email )
Change subject: mb/{google,intel}: Update FMD to support CBFS verification ......................................................................
mb/{google,intel}: Update FMD to support CBFS verification
This patch adds the required FMD changes to support the change in cse_lite 'commit Ie0266e50463926b8d377825 ("remove cbfs_unverified_area_map() API in cse_lite")' for CBFS verification.
With the change in cse_lite the ME_RW_A/B blobs are now part of FW_MAIN_A/B and corresponding entries in FMD can be removed for boards that currently use them.
BUG=b:284382452 Signed-off-by: Anil Kumar anil.kumar.k@intel.com Change-Id: I3ca88fee181f059852923d50292b24c0e5b9fd6d Reviewed-on: https://review.coreboot.org/c/coreboot/+/78502 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Julius Werner jwerner@chromium.org --- M src/mainboard/google/brox/chromeos.fmd M src/mainboard/google/brya/chromeos-nissa-16MiB-debugfsp.fmd M src/mainboard/google/brya/chromeos-nissa-16MiB.fmd M src/mainboard/google/brya/chromeos-nissa-32MiB.fmd M src/mainboard/google/brya/chromeos-serger.fmd M src/mainboard/google/brya/chromeos.fmd M src/mainboard/google/dedede/chromeos-dedede-16MiB.fmd M src/mainboard/google/dedede/chromeos-dedede-32MiB.fmd M src/mainboard/google/volteer/chromeos.fmd M src/mainboard/intel/adlrvp/chromeos.fmd M src/mainboard/intel/jasperlake_rvp/chromeos.fmd M src/mainboard/intel/mtlrvp/chromeos-debug-fsp.fmd M src/mainboard/intel/mtlrvp/chromeos.fmd 13 files changed, 12 insertions(+), 38 deletions(-)
Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved
diff --git a/src/mainboard/google/brox/chromeos.fmd b/src/mainboard/google/brox/chromeos.fmd index 59b24dd..65ceba7 100644 --- a/src/mainboard/google/brox/chromeos.fmd +++ b/src/mainboard/google/brox/chromeos.fmd @@ -14,7 +14,6 @@ VBLOCK_A 64K FW_MAIN_A(CBFS) RW_FWID_A 64 - ME_RW_A(CBFS) 3008K } RW_LEGACY(CBFS) 2M RW_MISC 1M { @@ -43,7 +42,6 @@ VBLOCK_B 64K FW_MAIN_B(CBFS) RW_FWID_B 64 - ME_RW_B(CBFS) 3008K } # Make WP_RO region align with SPI vendor # memory protected range specification. diff --git a/src/mainboard/google/brya/chromeos-nissa-16MiB-debugfsp.fmd b/src/mainboard/google/brya/chromeos-nissa-16MiB-debugfsp.fmd index ee92f2a..205f3dd 100644 --- a/src/mainboard/google/brya/chromeos-nissa-16MiB-debugfsp.fmd +++ b/src/mainboard/google/brya/chromeos-nissa-16MiB-debugfsp.fmd @@ -8,7 +8,6 @@ VBLOCK_A 8K FW_MAIN_A(CBFS) RW_FWID_A 64 - ME_RW_A(CBFS) 1434K } RW_MISC 152K { UNIFIED_MRC_CACHE(PRESERVE) 128K { @@ -26,7 +25,6 @@ VBLOCK_B 8K FW_MAIN_B(CBFS) RW_FWID_B 64 - ME_RW_B(CBFS) 1434K } # Make WP_RO region align with SPI vendor # memory protected range specification. diff --git a/src/mainboard/google/brya/chromeos-nissa-16MiB.fmd b/src/mainboard/google/brya/chromeos-nissa-16MiB.fmd index af69207..037812a 100644 --- a/src/mainboard/google/brya/chromeos-nissa-16MiB.fmd +++ b/src/mainboard/google/brya/chromeos-nissa-16MiB.fmd @@ -8,7 +8,6 @@ VBLOCK_A 8K FW_MAIN_A(CBFS) RW_FWID_A 64 - ME_RW_A(CBFS) 1434K } RW_LEGACY(CBFS) 1M RW_MISC 152K { @@ -27,7 +26,6 @@ VBLOCK_B 8K FW_MAIN_B(CBFS) RW_FWID_B 64 - ME_RW_B(CBFS) 1434K } # Make WP_RO region align with SPI vendor # memory protected range specification. diff --git a/src/mainboard/google/brya/chromeos-nissa-32MiB.fmd b/src/mainboard/google/brya/chromeos-nissa-32MiB.fmd index 1662600..00e7997 100644 --- a/src/mainboard/google/brya/chromeos-nissa-32MiB.fmd +++ b/src/mainboard/google/brya/chromeos-nissa-32MiB.fmd @@ -8,7 +8,6 @@ VBLOCK_A 8K FW_MAIN_A(CBFS) RW_FWID_A 64 - ME_RW_A(CBFS) 1434K } RW_LEGACY(CBFS) 1M RW_MISC 152K { @@ -33,7 +32,6 @@ VBLOCK_B 8K FW_MAIN_B(CBFS) RW_FWID_B 64 - ME_RW_B(CBFS) 1434K } # RW UNUSED Region 2. RW_UNUSED_2 7912K diff --git a/src/mainboard/google/brya/chromeos-serger.fmd b/src/mainboard/google/brya/chromeos-serger.fmd index 72c6429..7284936 100644 --- a/src/mainboard/google/brya/chromeos-serger.fmd +++ b/src/mainboard/google/brya/chromeos-serger.fmd @@ -14,7 +14,6 @@ VBLOCK_A 64K FW_MAIN_A(CBFS) RW_FWID_A 64 - ME_RW_A(CBFS) 3008K } RW_LEGACY(CBFS) 2M RW_MISC 1M { @@ -43,7 +42,6 @@ VBLOCK_B 64K FW_MAIN_B(CBFS) RW_FWID_B 64 - ME_RW_B(CBFS) 3008K } # Make WP_RO region align with SPI vendor # memory protected range specification. diff --git a/src/mainboard/google/brya/chromeos.fmd b/src/mainboard/google/brya/chromeos.fmd index e445383..ac7e51e 100644 --- a/src/mainboard/google/brya/chromeos.fmd +++ b/src/mainboard/google/brya/chromeos.fmd @@ -14,7 +14,6 @@ VBLOCK_A 64K FW_MAIN_A(CBFS) RW_FWID_A 64 - ME_RW_A(CBFS) 3008K } RW_LEGACY(CBFS) 2M RW_MISC 1M { @@ -43,7 +42,6 @@ VBLOCK_B 64K FW_MAIN_B(CBFS) RW_FWID_B 64 - ME_RW_B(CBFS) 3008K } # Make WP_RO region align with SPI vendor # memory protected range specification. diff --git a/src/mainboard/google/dedede/chromeos-dedede-16MiB.fmd b/src/mainboard/google/dedede/chromeos-dedede-16MiB.fmd index ade4866..0e21c4c 100644 --- a/src/mainboard/google/dedede/chromeos-dedede-16MiB.fmd +++ b/src/mainboard/google/dedede/chromeos-dedede-16MiB.fmd @@ -7,15 +7,13 @@ RW_LEGACY(CBFS)@0x0 0x100000 RW_SECTION_A@0x100000 0x3a4800 { VBLOCK_A@0x0 0x2000 - FW_MAIN_A(CBFS)@0x2000 0x2127c0 - RW_FWID_A@0x2147c0 0x40 - ME_RW_A(CBFS)@0x214800 0x190000 + FW_MAIN_A(CBFS)@0x2000 0x3a27c0 + RW_FWID_A@0x3a47c0 0x40 } RW_SECTION_B@0x4a4800 0x3a4800 { VBLOCK_B@0x0 0x2000 - FW_MAIN_B(CBFS)@0x2000 0x2127c0 - RW_FWID_B@0x2147c0 0x40 - ME_RW_B(CBFS)@0x214800 0x190000 + FW_MAIN_B(CBFS)@0x2000 0x3a27c0 + RW_FWID_B@0x3a47c0 0x40 } RW_MISC@0x849000 0x36000 { UNIFIED_MRC_CACHE(PRESERVE)@0x0 0x30000 { diff --git a/src/mainboard/google/dedede/chromeos-dedede-32MiB.fmd b/src/mainboard/google/dedede/chromeos-dedede-32MiB.fmd index 4b31861..60ea3de 100644 --- a/src/mainboard/google/dedede/chromeos-dedede-32MiB.fmd +++ b/src/mainboard/google/dedede/chromeos-dedede-32MiB.fmd @@ -10,15 +10,13 @@ RW_LEGACY(CBFS)@0x0 0xf00000 RW_SECTION_A@0xf00000 0x3e0000 { VBLOCK_A@0x0 0x10000 - FW_MAIN_A(CBFS)@0x10000 0x23ffc0 - RW_FWID_A@0x24ffc0 0x40 - ME_RW_A(CBFS)@0x250000 0x190000 + FW_MAIN_A(CBFS)@0x10000 0x3cffc0 + RW_FWID_A@0x3dffc0 0x40 } RW_SECTION_B@0x12e0000 0x3e0000 { VBLOCK_B@0x0 0x10000 - FW_MAIN_B(CBFS)@0x10000 0x23ffc0 - RW_FWID_B@0x24ffc0 0x40 - ME_RW_B(CBFS)@0x250000 0x190000 + FW_MAIN_B(CBFS)@0x10000 0x3cffc0 + RW_FWID_B@0x3dffc0 0x40 } RW_MISC@0x16c0000 0x40000 { UNIFIED_MRC_CACHE(PRESERVE)@0x0 0x30000 { diff --git a/src/mainboard/google/volteer/chromeos.fmd b/src/mainboard/google/volteer/chromeos.fmd index 6f833fe..1e3e77b 100644 --- a/src/mainboard/google/volteer/chromeos.fmd +++ b/src/mainboard/google/volteer/chromeos.fmd @@ -8,7 +8,6 @@ VBLOCK_A 64K FW_MAIN_A(CBFS) RW_FWID_A 64 - ME_RW_A(CBFS) 3M } RW_LEGACY(CBFS) 2M RW_MISC 1M { @@ -32,7 +31,6 @@ VBLOCK_B 64K FW_MAIN_B(CBFS) RW_FWID_B 64 - ME_RW_B(CBFS) 3M } # Make WP_RO region align with SPI vendor # memory protected range specification. diff --git a/src/mainboard/intel/adlrvp/chromeos.fmd b/src/mainboard/intel/adlrvp/chromeos.fmd index 53469de..0e8d321 100644 --- a/src/mainboard/intel/adlrvp/chromeos.fmd +++ b/src/mainboard/intel/adlrvp/chromeos.fmd @@ -15,7 +15,6 @@ VBLOCK_A 64K FW_MAIN_A(CBFS) RW_FWID_A 64 - ME_RW_A(CBFS) 3520K } RW_LEGACY(CBFS) 1M RW_MISC 1M { @@ -39,7 +38,6 @@ VBLOCK_B 64K FW_MAIN_B(CBFS) RW_FWID_B 64 - ME_RW_B(CBFS) 3520K } # Make WP_RO region align with SPI vendor # memory protected range specification. diff --git a/src/mainboard/intel/jasperlake_rvp/chromeos.fmd b/src/mainboard/intel/jasperlake_rvp/chromeos.fmd index e4e0b24..4fe11de 100644 --- a/src/mainboard/intel/jasperlake_rvp/chromeos.fmd +++ b/src/mainboard/intel/jasperlake_rvp/chromeos.fmd @@ -8,15 +8,13 @@ RW_LEGACY(CBFS)@0x0 0x100000 RW_SECTION_A@0x100000 0x3a4800 { VBLOCK_A@0x0 0x2000 - FW_MAIN_A(CBFS)@0x2000 0x2127c0 - RW_FWID_A@0x2147c0 0x40 - ME_RW_A(CBFS)@0x214800 0x190000 + FW_MAIN_A(CBFS)@0x2000 0x3a27c0 + RW_FWID_A@0x3a47c0 0x40 } RW_SECTION_B@0x4a4800 0x3a4800 { VBLOCK_B@0x0 0x2000 - FW_MAIN_B(CBFS)@0x2000 0x2127c0 - RW_FWID_B@0x2147c0 0x40 - ME_RW_B(CBFS)@0x214800 0x190000 + FW_MAIN_B(CBFS)@0x2000 0x3a27c0 + RW_FWID_B@0x3a47c0 0x40 } RW_MISC@0x849000 0x36000 { UNIFIED_MRC_CACHE(PRESERVE)@0x0 0x30000 { diff --git a/src/mainboard/intel/mtlrvp/chromeos-debug-fsp.fmd b/src/mainboard/intel/mtlrvp/chromeos-debug-fsp.fmd index 6ca1cc6..d085640 100644 --- a/src/mainboard/intel/mtlrvp/chromeos-debug-fsp.fmd +++ b/src/mainboard/intel/mtlrvp/chromeos-debug-fsp.fmd @@ -8,7 +8,6 @@ VBLOCK_A 8K FW_MAIN_A(CBFS) RW_FWID_A 64 - ME_RW_A(CBFS) 4400K } # This section starts at the 16M boundary in SPI flash. # MTL does not support a region crossing this boundary, @@ -18,7 +17,6 @@ VBLOCK_B 8K FW_MAIN_B(CBFS) RW_FWID_B 64 - ME_RW_B(CBFS) 4400K } RW_MISC 1M { UNIFIED_MRC_CACHE(PRESERVE) 128K { diff --git a/src/mainboard/intel/mtlrvp/chromeos.fmd b/src/mainboard/intel/mtlrvp/chromeos.fmd index a5bc538..c32a9f0 100644 --- a/src/mainboard/intel/mtlrvp/chromeos.fmd +++ b/src/mainboard/intel/mtlrvp/chromeos.fmd @@ -8,7 +8,6 @@ VBLOCK_A 8K FW_MAIN_A(CBFS) RW_FWID_A 64 - ME_RW_A(CBFS) 4400K } # This section starts at the 16M boundary in SPI flash. # MTL does not support a region crossing this boundary, @@ -18,7 +17,6 @@ VBLOCK_B 8K FW_MAIN_B(CBFS) RW_FWID_B 64 - ME_RW_B(CBFS) 4400K } RW_MISC 1M { UNIFIED_MRC_CACHE(PRESERVE) 128K {