Change in coreboot[master]: soc/intel/cmn/blk/pmc: API to inform PMC about PCI enumeration done

[Subrata Banik (Code Review)]

Attention is currently required from: Tim Wawrzynczak, Arthur Heymans, Eric Lai, Lean Sheng Tan, Werner Zeh.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63953 )

Change subject: soc/intel/cmn/blk/pmc: API to inform PMC about PCI enumeration done
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Patch Set 1:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/63953/comment/2acdee4b_4044bfad 
PS1, Line 10:
> What are the consequences of doing this? What does the PMC do differently?

This is the fun part of PMC FW being closed source where we don't know what PMC FW is expected to after receiving this IPC command. But, this is a BIOS requirement where PMC FW expects BIOS to send two PMC commands one after MRC done and another after PCI enumeration done. I do suspect some security attribute is getting set/locked post receiving this command by PMC.