[XS] Change in coreboot[main]: mb/google/rex/var/kanix: Update LAN clock request setting

[Matt DeVillier (Code Review)]

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86397?usp=email )

Change subject: mb/google/rex/var/kanix: Update LAN clock request setting
......................................................................

mb/google/rex/var/kanix: Update LAN clock request setting

According to the EVT's circuit(kanix_250116.pdf) change,
update LAN clock request to GPP_C11.

BUG=b:386025819
BRANCH=firmware-rex-15709.B
TEST=emerge-rex coreboot chromeos-bootimage; test LAN function on kanix
Change-Id: I5d27585717897203d6ac81ca47551be5771918c3
Signed-off-by: Kenneth Chan 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86397
Reviewed-by: Subrata Banik 
Reviewed-by: Ren Kuo 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/google/rex/variants/kanix/gpio.c
1 file changed, 4 insertions(+), 4 deletions(-)

Approvals:
  Subrata Banik: Looks good to me, approved
  Ren Kuo: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/mainboard/google/rex/variants/kanix/gpio.c b/src/mainboard/google/rex/variants/kanix/gpio.c
index 401a083..4b757a1 100644
--- a/src/mainboard/google/rex/variants/kanix/gpio.c
+++ b/src/mainboard/google/rex/variants/kanix/gpio.c
@@ -117,8 +117,8 @@
    PAD_NC(GPP_C09, NONE),
    /* GPP_C10 : net NC is not present in the given design */
    PAD_NC(GPP_C10, NONE),
-	/* GPP_C11 : Not Connected */
-	PAD_NC(GPP_C11, NONE),
+	/* GPP_C11 : [] ==> LAN_CLKREQ_ODL */
+	PAD_CFG_NF(GPP_C11, NONE, DEEP, NF1),
    /* GPP_C12 : NC pad. */
    PAD_NC(GPP_C12, NONE),
    /* GPP_C13 : Not connected */
@@ -174,8 +174,8 @@
    PAD_CFG_NF(GPP_D16, NONE, DEEP, NF2),
    /* GPP_D17 : [] ==> I2S_SOC_RX_HP_TX */
    PAD_CFG_NF(GPP_D17, NONE, DEEP, NF2),
-	/* GPP_D18 : [] ==> LAN_CLKREQ_ODL */
-	PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
+	/* GPP_D18 : Not Connected */
+	PAD_NC(GPP_D18, NONE),
    /* GPP_D19 : [] ==> EC_SOC_REC_SWITCH_ODL */
    PAD_CFG_GPI_LOCK(GPP_D19, NONE, LOCK_CONFIG),
    /* GPP_D20 : [] ==> SSD_CLKREQ_ODL */