Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42577 )
Change subject: mb/google/volteer/variants/volteer: clean up gpio.c ......................................................................
mb/google/volteer/variants/volteer: clean up gpio.c
Remove an unneccessary comment and group the variant_early_gpio_table together based on GPIO group.
Changed static variable names to be more descriptive.
BUG=none TEST="emerge-volteer coreboot chromeos-bootimage", flash and boot volteer to kernel.
Change-Id: Iabe810df1e5a3df35e3543ab81b9fdb6f76c223a Signed-off-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/volteer/variants/volteer/gpio.c 1 file changed, 6 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/42577/1
diff --git a/src/mainboard/google/volteer/variants/volteer/gpio.c b/src/mainboard/google/volteer/variants/volteer/gpio.c index 33167e3..85dfb95 100644 --- a/src/mainboard/google/volteer/variants/volteer/gpio.c +++ b/src/mainboard/google/volteer/variants/volteer/gpio.c @@ -5,8 +5,7 @@ #include <commonlib/helpers.h>
/* Pad configuration in ramstage */ -/* Leave eSPI pins untouched from default settings */ -static const struct pad_config gpio_table[] = { +static const struct pad_config override_gpio_table[] = { /* A7 : I2S2_SCLK ==> EN_PP3300_TRACKPAD */ PAD_CFG_GPO(GPP_A7, 1, DEEP), /* A8 : I2S2_SFRM ==> EN_PP3300_TOUCHSCREEN */ @@ -210,34 +209,27 @@ };
/* Early pad configuration in bootblock */ -static const struct pad_config early_gpio_table[] = { +static const struct pad_config override_early_gpio_table[] = { /* A12 : SATAXPCIE1 ==> M2_SSD_PEDET */ PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1), - /* A17 : DDSP_HPDC ==> MEM_CH_SEL */ PAD_CFG_GPI(GPP_A17, NONE, DEEP),
/* B11 : PMCALERT# ==> PCH_WP_OD */ PAD_CFG_GPI_GPIO_DRIVER(GPP_B11, NONE, DEEP), - /* B15 : GSPI0_CS0# ==> PCH_GSPI0_H1_TPM_CS_L */ PAD_CFG_NF(GPP_B15, NONE, DEEP, NF1), - /* B16 : GSPI0_CLK ==> PCH_GSPI0_H1_TPM_CLK */ PAD_CFG_NF(GPP_B16, NONE, DEEP, NF1), - /* B17 : GSPI0_MISO ==> PCH_GSPIO_H1_TPM_MISO */ PAD_CFG_NF(GPP_B17, NONE, DEEP, NF1), - /* B18 : GSPI0_MOSI ==> PCH_GSPI0_H1_TPM_MOSI_STRAP */ PAD_CFG_NF(GPP_B18, NONE, DEEP, NF1),
/* C0 : SMBCLK ==> EN_PP3300_WLAN */ PAD_CFG_GPO(GPP_C0, 1, DEEP), - /* C21 : UART2_TXD ==> H1_PCH_INT_ODL */ PAD_CFG_GPI_APIC(GPP_C21, NONE, PLTRST, LEVEL, INVERT), - /* C22 : UART2_RTS# ==> PCH_FPMCU_BOOT0 */ PAD_CFG_GPO(GPP_C22, 0, DEEP),
@@ -246,7 +238,6 @@
/* F11 : THC1_SPI2_CLK ==> EN_PP3300_WWAN */ PAD_CFG_GPO(GPP_F11, 1, DEEP), - /* F12 : GSXDOUT ==> WWAN_RST_ODL To meet timing constrains - drive reset low. Deasserted in ramstage. */ @@ -258,12 +249,12 @@
const struct pad_config *variant_override_gpio_table(size_t *num) { - *num = ARRAY_SIZE(gpio_table); - return gpio_table; + *num = ARRAY_SIZE(override_gpio_table); + return override_gpio_table; }
const struct pad_config *variant_early_gpio_table(size_t *num) { - *num = ARRAY_SIZE(early_gpio_table); - return early_gpio_table; + *num = ARRAY_SIZE(override_early_gpio_table); + return override_early_gpio_table; }
Nick Vaccaro has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/42577 )
Change subject: mb/google/volteer/variants/volteer: clean up gpio.c ......................................................................
mb/google/volteer/variants/volteer: clean up gpio.c
Remove an unneccessary comment and group the variant_early_gpio_table together based on GPIO group.
Changed static variable name gpio_table to override_gpio_table to be more descriptive.
BUG=none TEST="emerge-volteer coreboot chromeos-bootimage", flash and boot volteer to kernel.
Change-Id: Iabe810df1e5a3df35e3543ab81b9fdb6f76c223a Signed-off-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/volteer/variants/volteer/gpio.c 1 file changed, 3 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/42577/2
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42577 )
Change subject: mb/google/volteer/variants/volteer: clean up gpio.c ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42577 )
Change subject: mb/google/volteer/variants/volteer: clean up gpio.c ......................................................................
mb/google/volteer/variants/volteer: clean up gpio.c
Remove an unneccessary comment and group the variant_early_gpio_table together based on GPIO group.
Changed static variable name gpio_table to override_gpio_table to be more descriptive.
BUG=none TEST="emerge-volteer coreboot chromeos-bootimage", flash and boot volteer to kernel.
Change-Id: Iabe810df1e5a3df35e3543ab81b9fdb6f76c223a Signed-off-by: Nick Vaccaro nvaccaro@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/42577 Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/volteer/variants/volteer/gpio.c 1 file changed, 3 insertions(+), 12 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/volteer/variants/volteer/gpio.c b/src/mainboard/google/volteer/variants/volteer/gpio.c index 075e6e2..2b99e52 100644 --- a/src/mainboard/google/volteer/variants/volteer/gpio.c +++ b/src/mainboard/google/volteer/variants/volteer/gpio.c @@ -5,8 +5,7 @@ #include <commonlib/helpers.h>
/* Pad configuration in ramstage */ -/* Leave eSPI pins untouched from default settings */ -static const struct pad_config gpio_table[] = { +static const struct pad_config override_gpio_table[] = { /* A7 : I2S2_SCLK ==> EN_PP3300_TRACKPAD */ PAD_CFG_GPO(GPP_A7, 1, DEEP), /* A8 : I2S2_SFRM ==> EN_PP3300_TOUCHSCREEN */ @@ -211,31 +210,24 @@ static const struct pad_config early_gpio_table[] = { /* A12 : SATAXPCIE1 ==> M2_SSD_PEDET */ PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1), - /* A17 : DDSP_HPDC ==> MEM_CH_SEL */ PAD_CFG_GPI(GPP_A17, NONE, DEEP),
/* B11 : PMCALERT# ==> PCH_WP_OD */ PAD_CFG_GPI_GPIO_DRIVER(GPP_B11, NONE, DEEP), - /* B15 : GSPI0_CS0# ==> PCH_GSPI0_H1_TPM_CS_L */ PAD_CFG_NF(GPP_B15, NONE, DEEP, NF1), - /* B16 : GSPI0_CLK ==> PCH_GSPI0_H1_TPM_CLK */ PAD_CFG_NF(GPP_B16, NONE, DEEP, NF1), - /* B17 : GSPI0_MISO ==> PCH_GSPIO_H1_TPM_MISO */ PAD_CFG_NF(GPP_B17, NONE, DEEP, NF1), - /* B18 : GSPI0_MOSI ==> PCH_GSPI0_H1_TPM_MOSI_STRAP */ PAD_CFG_NF(GPP_B18, NONE, DEEP, NF1),
/* C0 : SMBCLK ==> EN_PP3300_WLAN */ PAD_CFG_GPO(GPP_C0, 1, DEEP), - /* C21 : UART2_TXD ==> H1_PCH_INT_ODL */ PAD_CFG_GPI_APIC(GPP_C21, NONE, PLTRST, LEVEL, INVERT), - /* C22 : UART2_RTS# ==> PCH_FPMCU_BOOT0 */ PAD_CFG_GPO(GPP_C22, 0, DEEP),
@@ -244,7 +236,6 @@
/* F11 : THC1_SPI2_CLK ==> EN_PP3300_WWAN */ PAD_CFG_GPO(GPP_F11, 1, DEEP), - /* F12 : GSXDOUT ==> WWAN_RST_ODL To meet timing constrains - drive reset low. Deasserted in ramstage. */ @@ -256,8 +247,8 @@
const struct pad_config *variant_override_gpio_table(size_t *num) { - *num = ARRAY_SIZE(gpio_table); - return gpio_table; + *num = ARRAY_SIZE(override_gpio_table); + return override_gpio_table; }
const struct pad_config *variant_early_gpio_table(size_t *num)