Werner Zeh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56154 )
Change subject: mb/intel/adlrvp_m: Enable EC software sync ......................................................................
mb/intel/adlrvp_m: Enable EC software sync
This patch enables CONFIG_VBOOT_EARLY_EC_SYNC. EC software sync will be performed in romstage.
BUG=None BRANCH=None TEST=Verify EC software sync works on adlrvp_m
Signed-off-by: Thejaswani Putta thejaswani.putta@intel.com Change-Id: I3a13094e5da2f672a6789fe86528de44e909045e Reviewed-on: https://review.coreboot.org/c/coreboot/+/56154 Reviewed-by: Selma Bensaid selma.bensaid@intel.com Reviewed-by: Anil Kumar K anil.kumar.k@intel.com Reviewed-by: Bora Guvendik bora.guvendik@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/intel/adlrvp/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Bora Guvendik: Looks good to me, approved Selma Bensaid: Looks good to me, but someone else must approve Anil Kumar K: Looks good to me, but someone else must approve
diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig index 954c02e..8ed37ab 100644 --- a/src/mainboard/intel/adlrvp/Kconfig +++ b/src/mainboard/intel/adlrvp/Kconfig @@ -27,7 +27,6 @@ select GBB_FLAG_FORCE_MANUAL_RECOVERY select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC select HAS_RECOVERY_MRC_CACHE - select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
config MAINBOARD_DIR string @@ -96,6 +95,7 @@ select VBOOT_LID_SWITCH select VBOOT_MOCK_SECDATA select EC_GOOGLE_CHROMEEC_SWITCHES if ADL_CHROME_EC + select VBOOT_EARLY_EC_SYNC if BOARD_INTEL_ADLRVP_M_EXT_EC
config UART_FOR_CONSOLE int