Change in ...coreboot[master]: nb/intel/gm45: Make fetching the blc_pwm freq its own function

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29924

Change subject: nb/intel/gm45: Make fetching the blc_pwm freq its own function
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nb/intel/gm45: Make fetching the blc_pwm freq its own function

Change-Id: I9ad364f84f3658be98ce7ad3a6f0f0fe3247fc41
Signed-off-by: Arthur Heymans 
---
M src/northbridge/intel/gm45/gma.c
1 file changed, 37 insertions(+), 26 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/29924/1

diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c
index b86e2b3..34cf367 100644
--- a/src/northbridge/intel/gm45/gma.c
+++ b/src/northbridge/intel/gm45/gma.c
@@ -668,6 +668,39 @@
    	return (blc_mod << 16) | blc_mod;
 }

+static int get_blc_pwm_freq_value(const char *edid_ascii_string)
+{
+	static int blc_pwm_freq = -1;
+	const struct blc_pwm_t *blc_pwm;
+	int i;
+	int blc_array_len;
+
+	if (blc_pwm_freq > 0)
+		return blc_pwm_freq;
+
+	blc_array_len = get_blc_values(&blc_pwm);
+	/* Find EDID string and pwm freq in lookup table */
+	for (i = 0; i < blc_array_len; i++) {
+		if (!strcmp(blc_pwm[i].ascii_string, edid_ascii_string)) {
+			blc_pwm_freq = blc_pwm[i].pwm_freq;
+			printk(BIOS_DEBUG, "Found EDID string: %s in lookup table, pwm: %dHz\n",
+			       blc_pwm[i].ascii_string, blc_pwm_freq);
+			break;
+		}
+	}
+
+	if (i == blc_array_len)
+		printk(BIOS_NOTICE, "Your panels EDID `%s` wasn't found in the"
+		       "lookup table.\n You may have issues with your panels"
+		       "backlight.\n If you want to help improving coreboot"
+		       "please report: this EDID string\n and the result"
+		       "of `intel_read read BLC_PWM_CTL`"
+		       "(from intel-gpu-tools)\n while running vendor BIOS\n",
+		       edid_ascii_string);
+
+	return blc_pwm_freq;
+}
+
 static void gma_pm_init_post_vbios(struct device *const dev,
    			const char *edid_ascii_string)
 {
@@ -675,9 +708,7 @@

u32 reg32;
    u8 reg8;
-	const struct blc_pwm_t *blc_pwm;
-	int blc_array_len, i;
-	u16 pwm_freq = 0;
+	u16 pwm_freq;

/* Setup Panel Power On Delays */
    reg32 = gtt_read(PP_ON_DELAYS);
@@ -708,31 +739,11 @@
    reg8 = 100;
    if (conf->duty_cycle != 0)
    	reg8 = conf->duty_cycle;
-	blc_array_len = get_blc_values(&blc_pwm);
-	if (conf->default_pwm_freq != 0)
+	pwm_freq = get_blc_pwm_freq_value(edid_ascii_string);
+	if (pwm_freq < 0 && conf->default_pwm_freq != 0)
    	pwm_freq = conf->default_pwm_freq;

-	/* Find EDID string and pwm freq in lookup table */
-	for (i = 0; i < blc_array_len; i++) {
-		if (!strncmp(blc_pwm[i].ascii_string, edid_ascii_string,
-				strlen(blc_pwm[i].ascii_string))) {
-			pwm_freq = blc_pwm[i].pwm_freq;
-			printk(BIOS_DEBUG, "Found EDID string: %s in lookup table, pwm: %dHz\n",
-				blc_pwm[i].ascii_string, pwm_freq);
-			break;
-		}
-	}
-
-	if (i == blc_array_len)
-		printk(BIOS_NOTICE, "Your panels EDID `%s` wasn't found in the"
-			"lookup table.\n You may have issues with your panels"
-			"backlight.\n If you want to help improving coreboot"
-			"please report: this EDID string\n and the result"
-			"of `intel_read read BLC_PWM_CTL`"
-			"(from intel-gpu-tools)\n while running vendor BIOS\n",
-			edid_ascii_string);
-
-	if (pwm_freq == 0)
+	if (pwm_freq < 0)
    	gtt_write(BLC_PWM_CTL, 0x06100610);
    else
    	gtt_write(BLC_PWM_CTL, freq_to_blc_pwm_ctl(dev, pwm_freq,