[M] Change in coreboot[master]: {cpu, security}: Stitch multiple microcodes per CPUID into CBFS

[Arthur Heymans (Code Review)]

Attention is currently required from: Himanshu Sahdev, Julius Werner, Lean Sheng Tan, Rizwan Qureshi, Subrata Banik, Tarun Tuli, Wonkyu Kim, Yu-Ping Wu.

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75357?usp=email )

Change subject: {cpu, security}: Stitch multiple microcodes per CPUID into CBFS
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Patch Set 14:

(4 comments)

File src/cpu/Kconfig:

https://review.coreboot.org/c/coreboot/+/75357/comment/45dc3073_677f78f9 :
PS14, Line 122: CPU_MICROCODE_CBFS_SPLIT_BINS
The code does intel specific things so this needs to be captured in the name.

https://review.coreboot.org/c/coreboot/+/75357/comment/6a3ecd96_1e1bdabb :
PS14, Line 123: bool "Include microcode per CPUID into CBFS"
This option will show on ALL platforms. Does it even make sense to have it as a user visible option?

File src/cpu/Makefile.inc:

https://review.coreboot.org/c/coreboot/+/75357/comment/461ff2f5_abbb3494 :
PS10, Line 74: microcode-params := $(shell find "$(microcode-params-dir)" -type f | sed -e 's/.*///')
> > > > > > > > > > > On lighter note, ~10ms is still a big number, we are looking to optimize 2-3ms even. :P
> > > > > > > > > > 
> > > > > > > > > > yeah on Chromebook every ms counts, I think this is also a very distinct differentiator of having coreboot instead of edk2 on Laptops ;)
> > > > > > > > > 
> > > > > > > > > @Arthur, as i have moved the FIT microcode entry here for RO CBFS. should we need to add support for Top Swap 2nd FIT like https://review.coreboot.org/c/coreboot/+/75357/14/src/cpu/intel/fit/Makefile... ?
> > > > > > > > 
> > > > > > > > fixing typo
> > > > > > > > 
> > > > > > > > "don't we need to add support for Top Swap 2nd FIT as well like it had exited in other makefile https://review.coreboot.org/c/coreboot/+/75357/14/src/cpu/intel/fit/Makefile... ?"
> > > > > > > 
> > > > > > > ping to get attention on the open question.
> > > > > >
> > > > > > Hmm the topswap FIT points to a separate FMAP region iirc which has only once MCU in there that the RW-A/B writes to. I believe it should be unaffected.
> > > > >
> > > > > okay, so we don't need to port those changes here under newly added Kconfig.
> > > >
> > > > @Arthur, wondering if you had chance to work on the proposed tooling for parsing the ucode blob and concluding the CPUID ? (which we can reuse while packing the respective ucode)
> > >
> > > I have a tool written in rust that can parse microcode. Now I need to output files and alias files.
> >
> > good to kw, please let me know if u need any support from myside. I can test when u have things ready?
>
> Ping! (closed to 1 month now since this CL is blocked)
>
> Wondering if there is any ETA at your side reg the planned task to get back here. if not then i would like to add the required documentation to explain the scope of this kconfig and how to rename the microcode file to intercept this feature in product line. we can't leave things as is when there is a product req.

Go ahead.

File src/cpu/Makefile.inc:

https://review.coreboot.org/c/coreboot/+/75357/comment/f05018a6_df0a08c7 :
PS14, Line 83: $(eval regions-for-file-$(params) = COREBOOT,FW_MAIN_A,FW_MAIN_B) \
Is this line needed?