Change in coreboot[master]: soc/intel/cannonlake: Configure GPIOs again after FSP-S is done - coreboot-gerrit

1 Feb 2021


      Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31250 )
Change subject: soc/intel/cannonlake: Configure GPIOs again after FSP-S is done
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Patch Set 5:
(1 comment)
Patchset:
PS5: 
Furquan, do you remember what pads exactly were overwritten? I'm surprised there was no problem in skl/kbl, because FSP-S configures some pads, too, there, based on a few UPDs (S0ix, HDA/Azalia, Clkreq, ...). That's what is happening on CNL, too. See CB:45211
I doubt that we will get any "fix" for this in FSP because it seems to be absolutely intended. - I'm not saying I like what FSP does, though. ;)
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I7787aa8f185f633627bcedc7f23504bf4a5250b4
Gerrit-Change-Number: 31250
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