Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33371
Change subject: mb/google/hatch: Update AC/DC loadline values ......................................................................
mb/google/hatch: Update AC/DC loadline values
Update the AC/DC loadline values for all domains. Using the same values as in arcada.
BUG=None BRANCH=None TEST=Build and Boot hatch EVT
Change-Id: If8ea48794d11dc68e40e6504c0d46a2b273a8ab6 Signed-off-by: Rizwan Qureshi rizwan.qureshi@intel.com --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 76 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/33371/1
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index 1123d53..333c0f8 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -47,6 +47,82 @@ # Unlock GPIO pads register "PchUnlockGpioPads" = "1"
+ # VR Settings Configuration for 4 Domains + #+----------------+-------+-------+-------+-------+ + #| Domain/Setting | SA | IA | GTUS | GTS | + #+----------------+-------+-------+-------+-------+ + #| Psi1Threshold | 20A | 20A | 20A | 20A | + #| Psi2Threshold | 5A | 5A | 5A | 5A | + #| Psi3Threshold | 1A | 1A | 1A | 1A | + #| Psi3Enable | 1 | 1 | 1 | 1 | + #| Psi4Enable | 1 | 1 | 1 | 1 | + #| ImonSlope | 0 | 0 | 0 | 0 | + #| ImonOffset | 0 | 0 | 0 | 0 | + #| IccMax | 6A | 70A | 31A | 31A | + #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | + #| AcLoadline | 10.3 | 1.8 | 3.1 | 3.1 | + #| DcLoadline | 10.3 | 1.8 | 3.1 | 3.1 | + #+----------------+-------+-------+-------+-------+ + register "domain_vr_config[VR_SYSTEM_AGENT]" = "{ + .vr_config_enable = 1, + .psi1threshold = VR_CFG_AMP(20), + .psi2threshold = VR_CFG_AMP(5), + .psi3threshold = VR_CFG_AMP(1), + .psi3enable = 1, + .psi4enable = 1, + .imon_slope = 0x0, + .imon_offset = 0x0, + .icc_max = VR_CFG_AMP(6), + .voltage_limit = 1520, + .ac_loadline = 1030, + .dc_loadline = 1030, + }" + + register "domain_vr_config[VR_IA_CORE]" = "{ + .vr_config_enable = 1, + .psi1threshold = VR_CFG_AMP(20), + .psi2threshold = VR_CFG_AMP(5), + .psi3threshold = VR_CFG_AMP(1), + .psi3enable = 1, + .psi4enable = 1, + .imon_slope = 0x0, + .imon_offset = 0x0, + .icc_max = VR_CFG_AMP(70), + .voltage_limit = 1520, + .ac_loadline = 180, + .dc_loadline = 180, + }" + + register "domain_vr_config[VR_GT_UNSLICED]" = "{ + .vr_config_enable = 1, + .psi1threshold = VR_CFG_AMP(20), + .psi2threshold = VR_CFG_AMP(5), + .psi3threshold = VR_CFG_AMP(1), + .psi3enable = 1, + .psi4enable = 1, + .imon_slope = 0x0, + .imon_offset = 0x0, + .icc_max = VR_CFG_AMP(31), + .voltage_limit = 1520, + .ac_loadline = 310, + .dc_loadline = 310, + }" + + register "domain_vr_config[VR_GT_SLICED]" = "{ + .vr_config_enable = 1, + .psi1threshold = VR_CFG_AMP(20), + .psi2threshold = VR_CFG_AMP(5), + .psi3threshold = VR_CFG_AMP(1), + .psi3enable = 1, + .psi4enable = 1, + .imon_slope = 0x0, + .imon_offset = 0x0, + .icc_max = VR_CFG_AMP(31), + .voltage_limit = 1520, + .ac_loadline = 310, + .dc_loadline = 310, + }" + register "PchPmSlpS3MinAssert" = "2" # 50ms register "PchPmSlpS4MinAssert" = "1" # 1s register "PchPmSlpSusMinAssert" = "1" # 500ms
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33371 )
Change subject: mb/google/hatch: Update AC/DC loadline values ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/33371/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/33371/1//COMMIT_MSG@9 PS1, Line 9: Using the same : values as in arcada. Shouldn't these be calculated on a per-platform basis?
Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33371 )
Change subject: mb/google/hatch: Update AC/DC loadline values ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/33371/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/33371/1//COMMIT_MSG@9 PS1, Line 9: Using the same : values as in arcada.
Shouldn't these be calculated on a per-platform basis?
True, PnP team is working to get the actual numbers, I put these numbers for time being.
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33371 )
Change subject: mb/google/hatch: Update AC/DC loadline values ......................................................................
Patch Set 1:
(1 comment)
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/33371/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/33371/1//COMMIT_MSG@9 PS1, Line 9: Using the same : values as in arcada.
True, PnP team is working to get the actual numbers, I put these numbers for time being.
I would suggest to start with these initial numbers. Going forward we will update these with more fine tuned values. Thanks.
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33371 )
Change subject: mb/google/hatch: Update AC/DC loadline values ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33371/1/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33371/1/src/mainboard/google/hatch/... PS1, Line 61: 70 We have internally reviewed data provided by OEM/ODM based on these settings. These values looks good and I would request to merge this CL. Thanks.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33371 )
Change subject: mb/google/hatch: Update AC/DC loadline values ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33371/1/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33371/1/src/mainboard/google/hatch/... PS1, Line 61: 70
We have internally reviewed data provided by OEM/ODM based on these settings. […]
Sumeet, can you give +1 or +2 on change-sets?
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33371 )
Change subject: mb/google/hatch: Update AC/DC loadline values ......................................................................
Patch Set 1: Code-Review+2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33371 )
Change subject: mb/google/hatch: Update AC/DC loadline values ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/33371/1/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33371/1/src/mainboard/google/hatch/... PS1, Line 61: 70
Sumeet, can you give +1 or +2 on change-sets?
Sumeet -- would these settings apply to all OEM designs or would it have to be tuned for each variant?
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33371 )
Change subject: mb/google/hatch: Update AC/DC loadline values ......................................................................
Patch Set 1:
Patch Set 1: Code-Review+2
(1 comment)
These settings apply to CML-U based all OEM designs.
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33371 )
Change subject: mb/google/hatch: Update AC/DC loadline values ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33371/1/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33371/1/src/mainboard/google/hatch/... PS1, Line 61: 70
Sumeet -- would these settings apply to all OEM designs or would it have to be tuned for each varian […]
Yes, these settings apply to all OEM designs.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33371 )
Change subject: mb/google/hatch: Update AC/DC loadline values ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33371/1/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33371/1/src/mainboard/google/hatch/... PS1, Line 61: 70
Yes, these settings apply to all OEM designs.
Thanks for the confirmation.
Furquan Shaikh has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33371 )
Change subject: mb/google/hatch: Update AC/DC loadline values ......................................................................
mb/google/hatch: Update AC/DC loadline values
Update the AC/DC loadline values for all domains. Using the same values as in arcada.
BUG=None BRANCH=None TEST=Build and Boot hatch EVT
Change-Id: If8ea48794d11dc68e40e6504c0d46a2b273a8ab6 Signed-off-by: Rizwan Qureshi rizwan.qureshi@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/33371 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com Reviewed-by: Furquan Shaikh furquan@google.com --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 76 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Sumeet R Pawnikar: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index a470032..6ff90f8 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -47,6 +47,82 @@ # Unlock GPIO pads register "PchUnlockGpioPads" = "1"
+ # VR Settings Configuration for 4 Domains + #+----------------+-------+-------+-------+-------+ + #| Domain/Setting | SA | IA | GTUS | GTS | + #+----------------+-------+-------+-------+-------+ + #| Psi1Threshold | 20A | 20A | 20A | 20A | + #| Psi2Threshold | 5A | 5A | 5A | 5A | + #| Psi3Threshold | 1A | 1A | 1A | 1A | + #| Psi3Enable | 1 | 1 | 1 | 1 | + #| Psi4Enable | 1 | 1 | 1 | 1 | + #| ImonSlope | 0 | 0 | 0 | 0 | + #| ImonOffset | 0 | 0 | 0 | 0 | + #| IccMax | 6A | 70A | 31A | 31A | + #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | + #| AcLoadline | 10.3 | 1.8 | 3.1 | 3.1 | + #| DcLoadline | 10.3 | 1.8 | 3.1 | 3.1 | + #+----------------+-------+-------+-------+-------+ + register "domain_vr_config[VR_SYSTEM_AGENT]" = "{ + .vr_config_enable = 1, + .psi1threshold = VR_CFG_AMP(20), + .psi2threshold = VR_CFG_AMP(5), + .psi3threshold = VR_CFG_AMP(1), + .psi3enable = 1, + .psi4enable = 1, + .imon_slope = 0x0, + .imon_offset = 0x0, + .icc_max = VR_CFG_AMP(6), + .voltage_limit = 1520, + .ac_loadline = 1030, + .dc_loadline = 1030, + }" + + register "domain_vr_config[VR_IA_CORE]" = "{ + .vr_config_enable = 1, + .psi1threshold = VR_CFG_AMP(20), + .psi2threshold = VR_CFG_AMP(5), + .psi3threshold = VR_CFG_AMP(1), + .psi3enable = 1, + .psi4enable = 1, + .imon_slope = 0x0, + .imon_offset = 0x0, + .icc_max = VR_CFG_AMP(70), + .voltage_limit = 1520, + .ac_loadline = 180, + .dc_loadline = 180, + }" + + register "domain_vr_config[VR_GT_UNSLICED]" = "{ + .vr_config_enable = 1, + .psi1threshold = VR_CFG_AMP(20), + .psi2threshold = VR_CFG_AMP(5), + .psi3threshold = VR_CFG_AMP(1), + .psi3enable = 1, + .psi4enable = 1, + .imon_slope = 0x0, + .imon_offset = 0x0, + .icc_max = VR_CFG_AMP(31), + .voltage_limit = 1520, + .ac_loadline = 310, + .dc_loadline = 310, + }" + + register "domain_vr_config[VR_GT_SLICED]" = "{ + .vr_config_enable = 1, + .psi1threshold = VR_CFG_AMP(20), + .psi2threshold = VR_CFG_AMP(5), + .psi3threshold = VR_CFG_AMP(1), + .psi3enable = 1, + .psi4enable = 1, + .imon_slope = 0x0, + .imon_offset = 0x0, + .icc_max = VR_CFG_AMP(31), + .voltage_limit = 1520, + .ac_loadline = 310, + .dc_loadline = 310, + }" + register "PchPmSlpS3MinAssert" = "2" # 50ms register "PchPmSlpS4MinAssert" = "1" # 1s register "PchPmSlpSusMinAssert" = "1" # 500ms
-
Furquan Shaikh (Code Review) -
Paul Menzel (Code Review)
-
Rizwan Qureshi (Code Review)
-
Sumeet R Pawnikar (Code Review)