Change in coreboot[master]: soc/intel/jsl: Add CdClock config

[Paul Menzel (Code Review)]

Attention is currently required from: Jamie Chen, Henry Sun, Simon Yang, Kane Chen, Patrick Rudolph, Karthik Ramasubramanian.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60009 )

Change subject: soc/intel/jsl: Add CdClock config
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Patch Set 9:

(2 comments)

File src/soc/intel/jasperlake/chip.h:

https://review.coreboot.org/c/coreboot/+/60009/comment/150a7b5f_58cac252 
PS9, Line 409: 	 * CdClock Frequency selection
What does Cd abbreviate?

https://review.coreboot.org/c/coreboot/+/60009/comment/1d5c24d9_9a8eeb37 
PS9, Line 411: 0xFF
0xff