[S] Change in coreboot[main]: soc/mediatek/mt8196: Add vcore DVFS settings

[Yidi Lin (Code Review)]

Yidi Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86070?usp=email )

Change subject: soc/mediatek/mt8196: Add vcore DVFS settings
......................................................................

soc/mediatek/mt8196: Add vcore DVFS settings

Add vcore settings, so that other tinysys (such as mcupm, spm, etc.)
will reference these value during initialization.

BUG=b:343878736
TEST=Build pass, boot successful. Check log with:
[INFO]	Vcore DVFS settings done

Change-Id: I0d3e1d6ea648af938d41a5c9461cdd2972371177
Signed-off-by: Kunlong Wang 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86070
Reviewed-by: Yu-Ping Wu 
Tested-by: build bot (Jenkins) 
Reviewed-by: Yidi Lin 
---
M src/soc/mediatek/mt8196/Makefile.mk
A src/soc/mediatek/mt8196/dvfsrc.c
M src/soc/mediatek/mt8196/include/soc/addressmap.h
A src/soc/mediatek/mt8196/include/soc/dvfsrc.h
4 files changed, 25 insertions(+), 0 deletions(-)

Approvals:
  Yidi Lin: Looks good to me, approved
  Yu-Ping Wu: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk
index f5420ce..a445efd 100644
--- a/src/soc/mediatek/mt8196/Makefile.mk
+++ b/src/soc/mediatek/mt8196/Makefile.mk
@@ -29,6 +29,7 @@
 romstage-y += ../common/dram_init.c
 romstage-y += ../common/dramc_param.c
 romstage-y += dvfs.c
+romstage-y += dvfsrc.c
 romstage-$(CONFIG_PCI) += ../common/early_init.c ../common/pcie.c
 romstage-y += ../common/emi.c
 romstage-y += irq2axi.c
diff --git a/src/soc/mediatek/mt8196/dvfsrc.c b/src/soc/mediatek/mt8196/dvfsrc.c
new file mode 100644
index 0000000..aea7302
--- /dev/null
+++ b/src/soc/mediatek/mt8196/dvfsrc.c
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
+
+#include <console/console.h>
+#include <device/mmio.h>
+#include <soc/addressmap.h>
+#include <soc/dvfsrc.h>
+
+void dvfsrc_opp_level_mapping(void)
+{
+	setbits32p(DVFSRC_RSRV_4, BIT(VCORE_B0_SHIFT));
+	printk(BIOS_INFO, "Vcore DVFS settings done\n");
+}
diff --git a/src/soc/mediatek/mt8196/include/soc/addressmap.h b/src/soc/mediatek/mt8196/include/soc/addressmap.h
index e04c01b..65257eb 100644
--- a/src/soc/mediatek/mt8196/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8196/include/soc/addressmap.h
@@ -156,6 +156,7 @@
    SPM_PBUS_BASE		= IO_PHYS + 0x0C00D000,
    RGU_BASE		= IO_PHYS + 0x0C010000,
    RC_BASE			= IO_PHYS + 0x0C011000,
+	DVFSRC_BASE		= IO_PHYS + 0x0C013000,
    GPT_BASE		= IO_PHYS + 0x0C015000,
    VLP_CKSYS_BASE		= IO_PHYS + 0x0C016000,
    PMIF_SPMI_P_BASE	= IO_PHYS + 0x0C018000,
diff --git a/src/soc/mediatek/mt8196/include/soc/dvfsrc.h b/src/soc/mediatek/mt8196/include/soc/dvfsrc.h
new file mode 100644
index 0000000..e4d8740
--- /dev/null
+++ b/src/soc/mediatek/mt8196/include/soc/dvfsrc.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
+
+#ifndef SOC_MEDIATEK_MT8196_MTK_VCORE
+#define SOC_MEDIATEK_MT8196_MTK_VCORE
+
+#define DVFSRC_RSRV_4		(DVFSRC_BASE + 0x290)
+#define VCORE_B0_SHIFT		23
+
+void dvfsrc_opp_level_mapping(void);
+
+#endif