the following patch was just integrated into master: commit 59e03342076ea79cb7c0ed2fdbd199947c8c5212 Author: Kyösti Mälkki kyosti.malkki@gmail.com Date: Sun Nov 20 11:03:13 2016 +0200
AGESA: Switch to MMCONF_SUPPORT_DEFAULT
Vendorcode always does PCI MMCONF access once it is enabled via MSR.
In coreboot proper, we don't give opportunity to make pci_read/write calls before PCI MMCONF is enabled via MSR. This happens early in romstage amd_initmmio() for all cores.
Change-Id: If31bc0a67b480bcc1d955632f413f5cdeec51a54 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/17533 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin adurbin@chromium.org
See https://review.coreboot.org/17533 for details.
-gerrit