Patch set updated for coreboot: 6b6c99c baytrail: gpio: Make pad input/output state mutually exclusive

[Aaron Durbin]

Aaron Durbin ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4971

-gerrit

commit 6b6c99cf21da741167b7a8112ff42fb3dd37d37b
Author: Shawn Nematbakhsh 
Date:   Wed Nov 13 15:37:11 2013 -0800

baytrail: gpio: Make pad input/output state mutually exclusive

Previously pads were being configured as both input and output
    simultaneously due to the config bits being active low. Create new
    defines that only enable either input or output, and use them in our
    GPIO configs.

BUG=chrome-os-partner:22863
    TEST=Manual on Rambi. Verify system boots and peripherals still
    function.
    BRANCH=None.

Change-Id: If386682a3d810864b7b9f5d2aecdb2e6cfceea86
    Signed-off-by: Shawn Nematbakhsh 
    Reviewed-on: https://chromium-review.googlesource.com/176725
    Reviewed-by: Aaron Durbin 
    Signed-off-by: Aaron Durbin 
---
 src/soc/intel/baytrail/baytrail/gpio.h | 24 ++++++++++++++----------
 1 file changed, 14 insertions(+), 10 deletions(-)

diff --git a/src/soc/intel/baytrail/baytrail/gpio.h b/src/soc/intel/baytrail/baytrail/gpio.h
index 154ac84..bdb33f1 100644
--- a/src/soc/intel/baytrail/baytrail/gpio.h
+++ b/src/soc/intel/baytrail/baytrail/gpio.h
@@ -143,13 +143,17 @@
 #define PAD_VAL_OUTPUT_DISABLE	(1 << 1)
 #define PAD_VAL_OUTPUT_ENABLE	(0 << 1)

+/* Input / Output state should usually be mutually exclusive */
+#define PAD_VAL_INPUT		(PAD_VAL_INPUT_ENABLE | PAD_VAL_OUTPUT_DISABLE)
+#define PAD_VAL_OUTPUT		(PAD_VAL_OUTPUT_ENABLE | PAD_VAL_INPUT_DISABLE)
+
 /* pad_val[0] - Value */
 #define PAD_VAL_HIGH		(1 << 0)
 #define PAD_VAL_LOW		(0 << 0)

/* pad_val reg power-on default varies by pad, and apparently can cause issues
  * if not set correctly, even if the pin isn't configured as GPIO. */
-#define PAD_VAL_DEFAULT		(PAD_VAL_INPUT_ENABLE | PAD_VAL_OUTPUT_DISABLE)
+#define PAD_VAL_DEFAULT		PAD_VAL_INPUT

/* Configure GPIOs as legacy by default. GPNCORE doesn't support
  * legacy config -- so also configure the pad regs as GPIO. We rely upon
@@ -158,7 +162,7 @@
    { .pad_conf0 = PAD_PU_10K | PAD_PULL_UP | PAD_CONFIG0_DEFAULT \
    	     | PAD_FUNC0, \
      .pad_conf1 = PAD_CONFIG1_DEFAULT, \
-	  .pad_val   = PAD_VAL_INPUT_ENABLE, \
+	  .pad_val   = PAD_VAL_INPUT, \
      .use_sel   = GPIO_USE_LEGACY, \
      .io_sel    = GPIO_DIR_INPUT }

@@ -166,7 +170,7 @@
    { .pad_conf0 = PAD_PU_10K | PAD_PULL_DOWN | PAD_CONFIG0_DEFAULT \
    	     | PAD_FUNC0, \
      .pad_conf1 = PAD_CONFIG1_DEFAULT, \
-	  .pad_val   = PAD_VAL_INPUT_ENABLE, \
+	  .pad_val   = PAD_VAL_INPUT, \
      .use_sel   = GPIO_USE_LEGACY, \
      .io_sel    = GPIO_DIR_INPUT }

@@ -174,7 +178,7 @@
    { .pad_conf0 = PAD_PU_10K | PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT \
    	     | PAD_FUNC0, \
      .pad_conf1 = PAD_CONFIG1_DEFAULT, \
-	  .pad_val   = PAD_VAL_INPUT_ENABLE, \
+	  .pad_val   = PAD_VAL_INPUT, \
      .use_sel   = GPIO_USE_LEGACY, \
      .io_sel    = GPIO_DIR_INPUT }

@@ -183,7 +187,7 @@
    { .pad_conf0 = PAD_PU_10K | PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT \
    	     | PAD_FUNC0 | PAD_IRQ_EN | PAD_TNE_IRQ, \
      .pad_conf1 = PAD_CONFIG1_DEFAULT, \
-	  .pad_val   = PAD_VAL_INPUT_ENABLE, \
+	  .pad_val   = PAD_VAL_INPUT, \
      .use_sel   = GPIO_USE_LEGACY, \
      .io_sel    = GPIO_DIR_INPUT, \
      .tne       = GPIO_NEDGE_ENABLE }
@@ -193,7 +197,7 @@
    { .pad_conf0 = PAD_PU_10K | PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT \
    	     | PAD_FUNC0 | PAD_IRQ_EN | PAD_TPE_IRQ, \
      .pad_conf1 = PAD_CONFIG1_DEFAULT, \
-	  .pad_val   = PAD_VAL_INPUT_ENABLE, \
+	  .pad_val   = PAD_VAL_INPUT, \
      .use_sel   = GPIO_USE_LEGACY, \
      .io_sel    = GPIO_DIR_INPUT, \
      .tne       = GPIO_PEDGE_ENABLE }
@@ -202,7 +206,7 @@
    { .pad_conf0 = PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT \
    	     | PAD_FUNC0, \
      .pad_conf1 = PAD_CONFIG1_DEFAULT, \
-	  .pad_val   = PAD_VAL_OUTPUT_ENABLE | PAD_VAL_LOW, \
+	  .pad_val   = PAD_VAL_OUTPUT | PAD_VAL_LOW, \
      .use_sel   = GPIO_USE_LEGACY, \
      .io_sel    = GPIO_DIR_OUTPUT, \
      .gp_lvl    = GPIO_LEVEL_LOW }
@@ -211,7 +215,7 @@
    { .pad_conf0 = PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT \
    	     | PAD_FUNC0, \
      .pad_conf1 = PAD_CONFIG1_DEFAULT, \
-	  .pad_val   = PAD_VAL_OUTPUT_ENABLE | PAD_VAL_HIGH, \
+	  .pad_val   = PAD_VAL_OUTPUT | PAD_VAL_HIGH, \
      .use_sel   = GPIO_USE_LEGACY, \
      .io_sel    = GPIO_DIR_OUTPUT, \
      .gp_lvl    = GPIO_LEVEL_HIGH }
@@ -238,7 +242,7 @@
 #define GPIO_ACPI_SCI \
    { .pad_conf0 = PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT | PAD_FUNC0, \
      .pad_conf1 = PAD_CONFIG1_DEFAULT, \
-	  .pad_val   = PAD_VAL_INPUT_ENABLE, \
+	  .pad_val   = PAD_VAL_INPUT, \
      .use_sel   = GPIO_USE_LEGACY, \
      .io_sel    = GPIO_DIR_INPUT, \
      .tne       = 1, \
@@ -246,7 +250,7 @@
 #define GPIO_ACPI_SMI \
    { .pad_conf0 = PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT | PAD_FUNC0, \
      .pad_conf1 = PAD_CONFIG1_DEFAULT, \
-	  .pad_val   = PAD_VAL_INPUT_ENABLE, \
+	  .pad_val   = PAD_VAL_INPUT, \
      .use_sel   = GPIO_USE_LEGACY, \
      .io_sel    = GPIO_DIR_INPUT, \
      .tne       = 1, \