Change in ...coreboot[master]: [WIP]superio/smsc: add SCH5636 Super I/O - coreboot-gerrit

30 Jun 2019

Eloy has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33912
Change subject: [WIP]superio/smsc: add SCH5636 Super I/O
......................................................................
[WIP]superio/smsc: add SCH5636 Super I/O
add LDNs from the datasheet. Power control is being
done by the EC which is in the same package.
Change-Id: I83548a325bf7d05f96731c3a2e5a5cb7f2780d36
Signed-off-by: Eloy Degen degeneloy@gmail.com
---
D src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl
A src/superio/smsc/sch5636/Kconfig
A src/superio/smsc/sch5636/Makefile.inc
A src/superio/smsc/sch5636/early_serial.c
A src/superio/smsc/sch5636/sch5636.h
A src/superio/smsc/sch5636/sch5636_early_init.c
A src/superio/smsc/sch5636/superio.c
7 files changed, 262 insertions(+), 17 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/33912/1

diff --git a/src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl b/src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl
deleted file mode 100644
index 7e55c02..0000000
--- a/src/mainboard/fujitsu/esprimo_e900/acpi/superio.asl
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2019 Eloy Degen.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <superio/smsc/sch5147/acpi/superio.asl>
diff --git a/src/superio/smsc/sch5636/Kconfig b/src/superio/smsc/sch5636/Kconfig
new file mode 100644
index 0000000..5a9aacc
--- /dev/null
+++ b/src/superio/smsc/sch5636/Kconfig
@@ -0,0 +1,18 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2009 Ronald G. Minnich
+## Copyright (C) 2012 Advanced Micro Devices, Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+
+config SUPERIO_SMSC_SCH5636
+	bool
diff --git a/src/superio/smsc/sch5636/Makefile.inc b/src/superio/smsc/sch5636/Makefile.inc
new file mode 100644
index 0000000..3a25e37
--- /dev/null
+++ b/src/superio/smsc/sch5636/Makefile.inc
@@ -0,0 +1,18 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2012 Advanced Micro Devices, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+bootblock-$(CONFIG_SUPERIO_SMSC_SCH5636) += sch5636_early_init.c
+romstage-$(CONFIG_SUPERIO_SMSC_SCH5636) += sch5636_early_init.c
+ramstage-$(CONFIG_SUPERIO_SMSC_SCH5636) += superio.c
diff --git a/src/superio/smsc/sch5636/early_serial.c b/src/superio/smsc/sch5636/early_serial.c
new file mode 100644
index 0000000..f058564
--- /dev/null
+++ b/src/superio/smsc/sch5636/early_serial.c
@@ -0,0 +1,65 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007 Uwe Hermann uwe@hermann-uwe.de
+ * Copyright (C) 2014 Edward O'Callaghan eocallaghan@alterapraxis.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <device/pnp_ops.h>
+#include <device/pnp_def.h>
+#include <stdint.h>
+
+#include "smscsuperio.h"
+
+#define SMSC_ENTRY_KEY 0x55
+#define SMSC_EXIT_KEY 0xAA
+
+/* Enable configuration: pass entry key '0x87' into index port dev. */
+static void pnp_enter_conf_state(pnp_devfn_t dev)
+{
+	u16 port = dev >> 8;
+	outb(SMSC_ENTRY_KEY, port);
+}
+
+/* Disable configuration: pass exit key '0xAA' into index port dev. */
+static void pnp_exit_conf_state(pnp_devfn_t dev)
+{
+	u16 port = dev >> 8;
+	outb(SMSC_EXIT_KEY, port);
+}
+
+
+/**
+ * Enable the specified serial port.
+ *
+ * @param dev The device to use.
+ * @param iobase The I/O base of the serial port (usually 0x3f8/0x2f8).
+ */
+void smscsuperio_enable_serial(pnp_devfn_t dev, u16 iobase)
+{
+	pnp_enter_conf_state(dev);
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+	switch (iobase) {
+	case 0x03f8:
+		pnp_set_irq(dev, PNP_IDX_IRQ0, 4);
+		break;
+	case 0x02f8:
+		pnp_set_irq(dev, PNP_IDX_IRQ0, 3);
+		break;
+	}
+	pnp_set_enable(dev, 1);
+	pnp_exit_conf_state(dev);
+}
diff --git a/src/superio/smsc/sch5636/sch5636.h b/src/superio/smsc/sch5636/sch5636.h
new file mode 100644
index 0000000..3a83aa2
--- /dev/null
+++ b/src/superio/smsc/sch5636/sch5636.h
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef SUPERIO_SCH_5636_H
+#define SUPERIO_SCH_5636_H
+
+/* LDN are listed on page 26 of the datasheet */
+
+#define SCH5636_FDD              0x0B            /* FDD */
+#define SCH5636_LPT              0x11            /* LPT */
+#define SMSCSUPERIO_SP1          0x07            /* Com1 */
+#define SMSCSUPERIO_SP2          0x08            /* Com2 */
+#define SCH5636_RTC                              /* RTC is not available */
+#define SCH5636_KBC              1               /* KBC */
+#define SCH5636_HWM                              /* HWM is done by the EC */
+#define SCH5636_RUNTIME          0x0A            /* Runtime */
+#define SCH5636_XBUS             0x0B            /* X-BUS */
+
+void sch5636_early_init(unsigned int port);
+
+#endif /* SUPERIO_SCH_5636_H */
diff --git a/src/superio/smsc/sch5636/sch5636_early_init.c b/src/superio/smsc/sch5636/sch5636_early_init.c
new file mode 100644
index 0000000..1ac1925
--- /dev/null
+++ b/src/superio/smsc/sch5636/sch5636_early_init.c
@@ -0,0 +1,68 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+
+#include <arch/io.h>
+#include <device/pnp_ops.h>
+#include <device/pnp.h>
+#include <stdint.h>
+
+#include "sch5636.h"
+
+static void pnp_enter_conf_state(pnp_devfn_t dev)
+{
+	unsigned int port = dev >> 8;
+	outb(0x55, port);
+}
+
+static void pnp_exit_conf_state(pnp_devfn_t dev)
+{
+	unsigned int port = dev >> 8;
+	outb(0xaa, port);
+}
+
+void sch5636_early_init(unsigned int port)
+{
+	pnp_devfn_t dev;
+
+	dev = PNP_DEV(port, SMSCSUPERIO_SP1);
+	pnp_enter_conf_state(dev);
+
+	/* Auto power management */
+	pnp_write_config(dev, 0x22, 0x38); /* BIT3+BIT4+BIT5 */
+	pnp_write_config(dev, 0x23, 0);
+
+	/* Enable SMSC UART 0 */
+	dev = PNP_DEV(port, SMSCSUPERIO_SP1);
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+
+	pnp_set_iobase(dev, PNP_IDX_IO0, CONFIG_TTYS0_BASE);
+	pnp_set_irq(dev, PNP_IDX_IRQ0, 0x4);
+
+	/* Enabled High speed, disabled MIDI support. */
+	pnp_write_config(dev, 0xF0, 0x02);
+	pnp_set_enable(dev, 1);
+
+	/* Enable keyboard */
+	dev = PNP_DEV(port, SCH5636_KBC);
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+	pnp_set_irq(dev, 0x70, 1);   /* IRQ 1 */
+	pnp_set_irq(dev, 0x72, 12);   /* IRQ 12 */
+	pnp_set_enable(dev, 1);
+
+	pnp_exit_conf_state(dev);
+}
diff --git a/src/superio/smsc/sch5636/superio.c b/src/superio/smsc/sch5636/superio.c
new file mode 100644
index 0000000..d08d62a
--- /dev/null
+++ b/src/superio/smsc/sch5636/superio.c
@@ -0,0 +1,60 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* RAM driver for the SMSC KBC1100 Super I/O chip */
+
+#include <device/device.h>
+#include <device/pnp.h>
+#include <superio/conf_mode.h>
+#include <pc80/keyboard.h>
+#include <stdlib.h>
+
+#include "sch5636.h"
+
+static void sch5636_init(struct device *dev)
+{
+	if (!dev->enabled)
+		return;
+
+	switch (dev->path.pnp.device) {
+	case SCH5636_KBC:
+		pc_keyboard_init(NO_AUX_DEVICE);
+		break;
+	}
+}
+
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = pnp_set_resources,
+	.enable_resources = pnp_enable_resources,
+	.enable           = pnp_alt_enable,
+	.init             = sch5636_init,
+	.ops_pnp_mode     = &pnp_conf_mode_55_aa,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+	{ NULL, SCH5636_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
+		0x7ff, 0x7ff, },
+};
+
+static void enable_dev(struct device *dev)
+{
+	pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+}
+
+struct chip_operations superio_smsc_sch5636_ops = {
+	CHIP_NAME("SMSC SCH5636 Super I/O")
+		.enable_dev = enable_dev,
+};
-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I83548a325bf7d05f96731c3a2e5a5cb7f2780d36
Gerrit-Change-Number: 33912
Gerrit-PatchSet: 1
Gerrit-Owner: Eloy
Gerrit-MessageType: newchange



    