[S] Change in coreboot[master]: Fix possible NULL dereference errors reported in static Analysis

[Hannah Williams (Code Review)]

Hannah Williams has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/73841 )

Change subject: Fix possible NULL dereference errors reported in static Analysis
......................................................................

Fix possible NULL dereference errors reported in static Analysis

Change-Id: I2f3c1c40d29c0d3528029c59adb4eab045e2524a
Signed-off-by: Hannah Williams 
---
M src/cpu/x86/smm/smm_module_loader.c
M src/mainboard/google/rex/mainboard.c
M src/soc/intel/common/block/acpi/pep.c
M src/soc/intel/common/block/gpio/gpio.c
M src/soc/intel/common/block/irq/irq.c
M src/soc/intel/common/block/timer/timer.c
M src/soc/intel/meteorlake/fsp_params.c
7 files changed, 28 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/73841/1

diff --git a/src/cpu/x86/smm/smm_module_loader.c b/src/cpu/x86/smm/smm_module_loader.c
index 6452707..ae1314fb 100644
--- a/src/cpu/x86/smm/smm_module_loader.c
+++ b/src/cpu/x86/smm/smm_module_loader.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

#include <acpi/acpi_gnvs.h>
+#include <assert.h>
 #include <cbmem.h>
 #include <commonlib/helpers.h>
 #include <commonlib/region.h>
@@ -261,6 +262,7 @@
    }

struct smm_stub_params *stub_params = rmodule_parameters(&smm_stub);
+	assert(stub_params);
    stub_params->stack_top = stack_top;
    stub_params->stack_size = g_stack_size;
    stub_params->c_handler = (uintptr_t)params->handler;
diff --git a/src/mainboard/google/rex/mainboard.c b/src/mainboard/google/rex/mainboard.c
index c1c22db..5a3a753 100644
--- a/src/mainboard/google/rex/mainboard.c
+++ b/src/mainboard/google/rex/mainboard.c
@@ -2,6 +2,7 @@

#include <acpi/acpi.h>
 #include <acpi/acpigen.h>
+#include <assert.h>
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
 #include <device/device.h>
@@ -25,6 +26,7 @@
    size_t base_num;

padbased_table = new_padbased_table();
+	assert(padbased_table);
    base_pads = variant_gpio_table(&base_num);
    gpio_padbased_override(padbased_table, base_pads, base_num);
    fw_config_gpio_padbased_override(padbased_table);
diff --git a/src/soc/intel/common/block/acpi/pep.c b/src/soc/intel/common/block/acpi/pep.c
index b315019..ab3fd5a 100644
--- a/src/soc/intel/common/block/acpi/pep.c
+++ b/src/soc/intel/common/block/acpi/pep.c
@@ -56,6 +56,8 @@
    const size_t register_count = lpm->num_substates * lpm->num_req_regs;
    uint32_t *reg = calloc(register_count, sizeof(uint32_t));

+	assert(reg);
+
    /* Read the various LPM state requirement registers from the PMC */
    for (size_t i = 0; i < lpm->num_substates; i++) {
    	if (!(lpm->lpm_enable_mask & BIT(i)))
diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c
index facc1fe..627727d 100644
--- a/src/soc/intel/common/block/gpio/gpio.c
+++ b/src/soc/intel/common/block/gpio/gpio.c
@@ -436,7 +436,8 @@
 {
    struct pad_config *padbased_table;
    padbased_table = malloc(sizeof(struct pad_config) * TOTAL_PADS);
-	memset(padbased_table, 0, sizeof(struct pad_config) * TOTAL_PADS);
+	if (padbased_table != NULL)
+		memset(padbased_table, 0, sizeof(struct pad_config) * TOTAL_PADS);

return padbased_table;
 }
@@ -653,7 +654,7 @@

static int gpio_non_smm_lock_pad(const struct gpio_lock_config *pad_info)
 {
-	const struct pad_community *comm = gpio_get_community(pad_info->pad);
+	const struct pad_community *comm;
    uint16_t offset;
    size_t rel_pad;

@@ -661,6 +662,7 @@
    	printk(BIOS_ERR, "%s: Error: pad_info is null!\n", __func__);
    	return -1;
    }
+	comm = gpio_get_community(pad_info->pad);

if (cpu_soc_is_in_untrusted_mode()) {
    	printk(BIOS_ERR, "%s: Error: IA Untrusted Mode enabled, can't lock pad!\n",
diff --git a/src/soc/intel/common/block/irq/irq.c b/src/soc/intel/common/block/irq/irq.c
index 4ffe138..463a078 100644
--- a/src/soc/intel/common/block/irq/irq.c
+++ b/src/soc/intel/common/block/irq/irq.c
@@ -269,6 +269,7 @@
    struct pci_irq_entry *entry = malloc(sizeof(*entry));
    struct pci_irq_entry **tmp = head;

+	assert(entry);
    entry->devfn = devfn;
    entry->pin = pin;
    entry->irq = irq;
@@ -374,7 +375,7 @@
    	return false;

pin_irq_map = calloc(MAX_SLOTS, sizeof(struct slot_pin_irq_map) * PCI_INT_MAX);
-
+	assert(pin_irq_map);
    pirq_map.type = PIRQ_GSI;
    legacy_pirq_routing = lpc_get_pic_pirq_routing(&pirq_routes);
    for (i = 0; i < PIRQ_COUNT && i < pirq_routes; i++)
diff --git a/src/soc/intel/common/block/timer/timer.c b/src/soc/intel/common/block/timer/timer.c
index 88d1bf2..ec03e1f 100644
--- a/src/soc/intel/common/block/timer/timer.c
+++ b/src/soc/intel/common/block/timer/timer.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

+#include <assert.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/tsc.h>
 #include <intelblocks/msr.h>
@@ -103,5 +104,8 @@
     * Some Intel SoCs like Skylake, Kabylake and Cometlake don't report
     * the crystal clock, in that case return bus frequency using CPUID.16h
     */
-	return get_freq_from_cpuid16h();
+	tsc_freq = get_freq_from_cpuid16h();
+
+	assert(tsc_freq);
+	return tsc_freq;
 }
diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c
index 041429d..c5887ba 100644
--- a/src/soc/intel/meteorlake/fsp_params.c
+++ b/src/soc/intel/meteorlake/fsp_params.c
@@ -233,6 +233,7 @@

/* Convert PCH device entries to FSP format */
    config = calloc(pch_total, sizeof(*config));
+	assert(config);
    entry = get_cached_pci_irqs();
    while (entry) {
    	if (!is_pch_slot(entry->devfn)) {