Attention is currently required from: Maulik V Vaghela, Ravishankar Sarawadi, Tim Wawrzynczak, Reka Norman, Meera Ravindranath, Nick Vaccaro, Balaji Manigandan, Raj Astekar, Patrick Rudolph, Karthik Ramasubramanian.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52731 )
Change subject: soc/common/smbus: Add support for reading spd data via smbus for DDR5
......................................................................
Patch Set 7:
(1 comment)
File src/soc/intel/common/block/smbus/smbuslib.c:
https://review.coreboot.org/c/coreboot/+/52731/comment/9df55551_d2fdb8b6
PS7, Line 10: { 0, 1 },
: { 2, 2 },
: { 3, 47 },
: { 126, 127 },
: { 192, 213 },
: { 230, 235 },
: { 512, 520 },
: { 521, 550 },
Do you know where the JEDEC documentation for the changes added to the SPD table values are for DDR5 […]
SPD5118, SPD5108 HUB AND SERIAL PRESENCE DETECT DEVICE STANDARD
JESD300-5 ?
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