[XS] Change in coreboot[main]: soc/intel/meteorlake: Add missing USB port definitions

[Matt DeVillier (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Intel coreboot Reviewers, Jakub "Kuba" Czapiga, Kapil Porwal, Matt DeVillier, Subrata Banik, Tarun.

Hello Dinesh Gehlot, Eran Mitrani, Intel coreboot Reviewers, Jakub "Kuba" Czapiga, Kapil Porwal, Sean Rhodes, Subrata Banik, Tarun, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/86319?usp=email

to look at the new patch set (#2).

Change subject: soc/intel/meteorlake: Add missing USB port definitions
......................................................................

soc/intel/meteorlake: Add missing USB port definitions

The TCSS_XHCI controller has a single USB2 port followed by 4 USB3
ports; the XHCI controller has 12 USB2 ports followed by 2 USB3
ports. The topology was queried from the root hub on each controller
and returned via the descriptor.

Add the 2 missing USB2 ports to the XHCI controller and the one to
the TSS_XHCI controller.

TEST=build/boot Win11, Linux 6.x on starlabs/starbook_mtl.

Change-Id: I5dc97f150ff064d55e7969f10c1cea8ba72d6bfb
Signed-off-by: Matt DeVillier 
---
M src/soc/intel/meteorlake/chipset.cb
1 file changed, 9 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/86319/2