[XS] Change in coreboot[main]: pc80/rtc: Clear CMOS on errors on S3 resume too - coreboot-gerrit

3 Nov 2023


      Attention is currently required from: Kyösti Mälkki, Nico Huber.
Bill XIE has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78881?usp=email )
Change subject: pc80/rtc: Clear CMOS on errors on S3 resume too
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Patch Set 1:
(1 comment)
File src/drivers/pc80/rtc/option.c:
https://review.coreboot.org/c/coreboot/+/78881/comment/c8d761c9_fa032a97 :
PS1, Line 204: 		(CONFIG(STATIC_OPTION_TABLE) && !acpi_is_wakeup_s3())
...
@Jonathon Hall The ultimate solution fur this may be your proposal in the comment of CB:78288 to exclude the range of memory training data from being reset.
Implemented in CB:78906.
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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I1533875466f6eb7b409bb19ef98f6dcaf2d115c4
Gerrit-Change-Number: 78881
Gerrit-PatchSet: 1
Gerrit-Owner: Nico Huber nico.h@gmx.de
Gerrit-Reviewer: Bill XIE persmule@hardenedlinux.org
Gerrit-Reviewer: Jonathon Hall jonathon.hall@puri.sm
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